From: "Nilawar, Badal" <badal.nilawar@intel.com>
To: Riana Tauro <riana.tauro@intel.com>,
"Anoop, Vijay" <anoop.c.vijay@intel.com>,
<intel-xe@lists.freedesktop.org>
Cc: <umesh.nerlige.ramappa@intel.com>, <rodrigo.vivi@intel.com>,
<aravind.iddamsetty@intel.com>, <anshuman.gupta@intel.com>,
<matthew.d.roper@intel.com>, <michael.j.ruhl@intel.com>,
<paul.e.luse@intel.com>, <mohamed.mansoor.v@intel.com>,
<kam.nasim@intel.com>
Subject: Re: [PATCH v9 3/6] drm/xe/sysctrl: Add mailbox communication headers
Date: Fri, 13 Mar 2026 10:17:12 +0530 [thread overview]
Message-ID: <7a5fc775-3bf4-4fb3-915b-e696cd4352cc@intel.com> (raw)
In-Reply-To: <d7eeb026-2de9-4dc3-ba4e-610cc9a97e17@intel.com>
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On 11-03-2026 12:59, Riana Tauro wrote:
> What is the reason of using SCHI? why not just mailbox_msg_hdr?
Agree, no need to introduce new term, just xe_sysctrl_mailbox_msg_hdr is
fine.
Thanks,
Badal
>
>> +struct xe_sysctrl_mailbox_schi_msg_hdr {
>> + __le32 data;
>> +} __packed;
>> +
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next prev parent reply other threads:[~2026-03-13 4:47 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-10 18:23 [PATCH v9 0/6] drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms Anoop, Vijay
2026-03-10 18:23 ` [PATCH v9 1/6] drm/xe/sysctrl: Add System Controller types and device integration Anoop, Vijay
2026-03-18 16:07 ` Umesh Nerlige Ramappa
2026-03-10 18:23 ` [PATCH v9 2/6] drm/xe/sysctrl: Add System Controller register definitions Anoop, Vijay
2026-03-10 18:23 ` [PATCH v9 3/6] drm/xe/sysctrl: Add mailbox communication headers Anoop, Vijay
2026-03-11 7:29 ` Riana Tauro
2026-03-13 4:47 ` Nilawar, Badal [this message]
2026-03-10 18:23 ` [PATCH v9 4/6] drm/xe/sysctrl: Add System Controller initialization Anoop, Vijay
2026-03-11 10:16 ` Gupta, Anshuman
2026-03-11 10:59 ` Riana Tauro
2026-03-12 4:32 ` Umesh Nerlige Ramappa
2026-03-10 18:23 ` [PATCH v9 5/6] drm/xe/sysctrl: Add mailbox communication implementation Anoop, Vijay
2026-03-12 5:13 ` Riana Tauro
2026-03-10 18:23 ` [PATCH v9 6/6] drm/xe/pci: Enable System Controller for CRI platform Anoop, Vijay
2026-03-11 11:31 ` Riana Tauro
2026-03-12 5:54 ` Umesh Nerlige Ramappa
2026-03-10 18:30 ` ✗ CI.checkpatch: warning for drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms (rev10) Patchwork
2026-03-10 18:31 ` ✓ CI.KUnit: success " Patchwork
2026-03-10 19:08 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-11 12:30 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-03-12 5:18 ` [PATCH v9 0/6] drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms Riana Tauro
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