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Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Kuogee Hsieh , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Ritesh Kumar , Mahadevan P References: <20260911-nord-drv-dt-v1-0-e25c073cf1b6@oss.qualcomm.com> <20260911-nord-drv-dt-v1-3-e25c073cf1b6@oss.qualcomm.com> Content-Language: en-GB From: Nabige Aala In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: DkR52AVniZZDun8C0BN43y1MOH_CsL8_ X-Proofpoint-GUID: DkR52AVniZZDun8C0BN43y1MOH_CsL8_ X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE3MDA3MyBTYWx0ZWRfXzeUmEF467cy2 XiQX9zF0nPvNV3zxYL7ds0UUuwYTJFJgUqonVtO2QsVac2PJ942wHkPvHR+fsGUwuiY7cAjO6n5 MIyAhLBk0M1f/gHSUzUll56CeThVbiw= X-Authority-Analysis: v=2.4 cv=I9fw19gg c=1 sm=1 tr=0 ts=6aab7dd9 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engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-16_03,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 clxscore=1015 bulkscore=0 phishscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609170073 On 9/17/2026 7:06 AM, Shawn Guo wrote: > On Fri, Sep 11, 2026 at 09:06:34PM +0530, Nabige Aala wrote: >> From: Mahadevan P >> >> Add the binding for the display subsystem (MDSS) found on the Qualcomm >> Nord SoC. Nord is MDSS 12.1, DP-only (no DSI), with two independent DP >> controllers. >> >> Signed-off-by: Mahadevan P >> Signed-off-by: Nabige Aala >> --- >> .../bindings/display/msm/qcom,nord-mdss.yaml | 98 ++++++++++++++++++++++ >> 1 file changed, 98 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml >> new file mode 100644 >> index 000000000000..0b0cacdca9db >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml >> @@ -0,0 +1,98 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/display/msm/qcom,nord-mdss.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Nord display subsystem (MDSS) >> + >> +maintainers: >> + - Mahadevan P >> + >> +description: >> + Nord display subsystem consists of MDSS (display controller), DPU 1499A >> + (display processing unit), and display interface controllers (DP only, no DSI). >> + This is MDSS 12.1, DP-only, with 2 independent DP controllers. >> + >> +$ref: /schemas/display/msm/mdss-common.yaml# >> + >> +properties: >> + compatible: >> + const: qcom,nord-mdss >> + >> + clocks: >> + items: >> + - description: Display AHB >> + - description: Display hf AXI >> + - description: Display core >> + >> + clock-names: >> + items: >> + - const: iface >> + - const: bus >> + - const: core >> + >> + iommus: >> + maxItems: 1 > The DTS in downstream repository doesn't seem to agree. There is two > items for iommus. I checked the Nord IPCAT. the resulted SID is same for both the SID (i.e.  0x03e0) in downstream repository. I think we should update the downstream DT and use a single SID entry. >> + >> + interconnects: >> + items: >> + - description: Interconnect path from mdp0 port to the data bus >> + - description: Interconnect path from CPU to the reg bus >> + >> + interconnect-names: >> + items: >> + - const: mdp0-mem >> + - const: cpu-cfg >> + >> +patternProperties: >> + "^display-controller@[0-9a-f]+$": >> + type: object >> + additionalProperties: true >> + properties: >> + compatible: >> + const: qcom,nord-dpu >> + >> + "^displayport-controller@[0-9a-f]+$": >> + type: object >> + additionalProperties: true >> + properties: >> + compatible: >> + const: qcom,nord-dp >> + >> + "^phy@[0-9a-f]+$": >> + type: object >> + additionalProperties: true >> + properties: >> + compatible: >> + const: qcom,nord-dp-phy >> + >> +required: >> + - compatible >> + >> +unevaluatedProperties: false >> + >> +examples: >> + - | >> + #include > Please run dt_binding_check against mainline kernel where the header is > actually qcom,nord-dispcc.h. Ack, I will update according to mainline kernel. Thanks, Nabige > > Shawn > >> + #include >> + #include >> + >> + display-subsystem@ae00000 { >> + compatible = "qcom,nord-mdss"; >> + reg = <0x0ae00000 0x1000>; >> + reg-names = "mdss"; >> + power-domains = <&dispcc_gdsc>; >> + clocks = <&dispcc DISPCC_MDSS_AHB_CLK>, >> + <&gcc GCC_DISP_HF_AXI_CLK>, >> + <&dispcc DISPCC_MDSS_MDP_CLK>; >> + clock-names = "iface", "bus", "core"; >> + resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; >> + interrupts = ; >> + interrupt-controller; >> + #interrupt-cells = <1>; >> + iommus = <&apps_smmu 0x800 0x420>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges; >> + }; >> >> -- >> 2.34.1 >> >> >> -- >> linux-phy mailing list >> linux-phy@lists.infradead.org >> https://lists.infradead.org/mailman/listinfo/linux-phy