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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-459e586eef8sm251813365e9.21.2025.08.11.06.13.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Aug 2025 06:13:58 -0700 (PDT) Message-ID: <7de5cc4e-474c-4e42-ae60-70d1fafa837f@linaro.org> Date: Mon, 11 Aug 2025 15:13:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 05/13] hw/arm, target/arm: nested virtualisation on HVF From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= To: Mohamed Mediouni , qemu-devel@nongnu.org Cc: Peter Maydell , Shannon Zhao , "Michael S. Tsirkin" , Ani Sinha , qemu-arm@nongnu.org, Paolo Bonzini , Roman Bolshakov , Igor Mammedov , Phil Dennis-Jordan , Alexander Graf , Mads Ynddal , Cameron Esfahani References: <20250808070137.48716-1-mohamed@unpredictable.fr> <20250808070137.48716-6-mohamed@unpredictable.fr> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On 11/8/25 14:56, Philippe Mathieu-Daudé wrote: > On 8/8/25 09:01, Mohamed Mediouni wrote: >> Signed-off-by: Mohamed Mediouni >> --- >>   hw/arm/virt.c         |  9 ++++++--- >>   target/arm/hvf-stub.c | 15 +++++++++++++++ >>   target/arm/hvf/hvf.c  | 41 +++++++++++++++++++++++++++++++++++++++-- >>   target/arm/hvf_arm.h  |  3 +++ >>   4 files changed, 63 insertions(+), 5 deletions(-) >> >> diff --git a/hw/arm/virt.c b/hw/arm/virt.c >> index 59e6c2b9df..91d8cd9363 100644 >> --- a/hw/arm/virt.c >> +++ b/hw/arm/virt.c >> @@ -817,8 +817,7 @@ static void create_gic(VirtMachineState *vms, >> MemoryRegion *mem) >>           g_assert_not_reached(); >>       } >> -    if (kvm_enabled() && vms->virt && >> -        (revision != 3 || !kvm_irqchip_in_kernel())) { >> +    if (kvm_enabled() && vms->virt && (revision != 3 || ! >> kvm_irqchip_in_kernel())) { >>           error_report("KVM EL2 is only supported with in-kernel GICv3"); >>           exit(1); >>       } >> @@ -2281,7 +2280,8 @@ static void machvirt_init(MachineState *machine) >>           exit(1); >>       } >> -    if (vms->virt && !kvm_enabled() && !tcg_enabled() && ! >> qtest_enabled()) { >> +    if (vms->virt && !kvm_enabled() && !tcg_enabled() >> +       && !hvf_enabled() && !qtest_enabled()) { >>           error_report("mach-virt: %s does not support providing " >>                        "Virtualization extensions to the guest CPU", >>                        current_accel_name()); >> @@ -2553,6 +2553,9 @@ static void virt_set_virt(Object *obj, bool >> value, Error **errp) >>       VirtMachineState *vms = VIRT_MACHINE(obj); >>       vms->virt = value; >> +#if defined(CONFIG_HVF) && defined(__aarch64__) >> +    hvf_arm_el2_enable(value); >> +#endif >>   } > We don't have hvf_arm_el1_enable(). I think we just want to always > provide the most performant configuration to users. > IOW, we don't need hvf_arm_el2_enable(). I'd just always enable EL2 > (if supported) in hvf_arm_get_host_cpu_features(). We create vCPUs in machvirt_init(). Upon vCPU INITialization, we check host features. Then during REALIZation, we check the QOM properties. If 'virt' flag is disabled, machvirt_init() sets "has_el2" property to false, effectively setting ARMCPU::has_el2 field to %false. In arm_cpu_realizefn(), if ARMCPU::has_el2 we unset ARM_FEATURE_EL2.