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From: Adrian Hunter <adrian.hunter@intel.com>
To: Ritesh Harjani <riteshh@codeaurora.org>,
	ulf.hansson@linaro.org, linux-mmc@vger.kernel.org,
	shawn.lin@rock-chips.com
Cc: david.brown@linaro.org, andy.gross@linaro.org,
	devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	georgi.djakov@linaro.org, alex.lemberg@sandisk.com,
	mateusz.nowak@intel.com, Yuliy.Izrailov@sandisk.com,
	asutoshd@codeaurora.org, david.griego@linaro.org,
	stummala@codeaurora.org, venkatg@codeaurora.org,
	sboyd@codeaurora.org, bjorn.andersson@linaro.org,
	pramod.gurav@linaro.org
Subject: Re: [PATCH v5 03/12] mmc: sdhci-msm: add pltfm_data support to get clk-rates from DT
Date: Mon, 10 Oct 2016 12:35:40 +0300	[thread overview]
Message-ID: <7e5c2bfe-0a67-71e2-d083-49d9a712482e@intel.com> (raw)
In-Reply-To: <1475678440-3525-4-git-send-email-riteshh@codeaurora.org>

On 05/10/16 17:40, Ritesh Harjani wrote:
> This adds support for sdhc-msm controllers to get supported
> clk-rates from DT. sdhci-msm would need it's own set_clock
> ops to be implemented. For this, supported clk-rates needs
> to be populated in sdhci_msm_pltfm_data.
> 
> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
> ---
>  .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
>  drivers/mmc/host/sdhci-msm.c                       | 48 ++++++++++++++++++++++
>  2 files changed, 49 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 485483a..6a83b38 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -17,6 +17,7 @@ Required properties:
>  	"iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
>  	"core"	- SDC MMC clock (MCLK) (required)
>  	"bus"	- SDCC bus voter clock (optional)
> +- clk-rates: Array of supported GCC clock frequencies for sdhc, Units - Hz.
>  
>  Example:
>  
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 85ddaae..042ecb2 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -81,6 +81,8 @@ struct sdhci_msm_host {
>  	struct clk *clk;	/* main SD/MMC bus clock */
>  	struct clk *pclk;	/* SDHC peripheral bus clock */
>  	struct clk *bus_clk;	/* SDHC bus voter clock */
> +	u32 *clk_table;
> +	int clk_table_sz;
>  	struct mmc_host *mmc;
>  	bool use_14lpp_dll_reset;
>  };
> @@ -582,6 +584,50 @@ static const struct sdhci_pltfm_data sdhci_msm_pdata = {
>  	.ops = &sdhci_msm_ops,
>  };
>  
> +static int sdhci_msm_dt_get_array(struct device *dev, const char *prop_name,
> +				u32 **table, int *size)

It is nice to align to the open parenthesis.  Have a look at the checks from
checkpatch --strict

> +{
> +	struct device_node *np = dev->of_node;
> +	int count, ret;
> +	u32 *arr;
> +
> +	count = of_property_count_elems_of_size(np, prop_name, sizeof(u32));

Shouldn't this be of_property_count_u32_elems()

> +	if (count < 0) {
> +		dev_warn(dev, "%s: Invalid dt property, err(%d)\n",
> +				prop_name, count);
> +		return count;
> +	}
> +
> +	arr = kcalloc(count, sizeof(*arr), GFP_KERNEL);
> +	if (!arr)
> +		return -ENOMEM;
> +
> +	ret = of_property_read_u32_array(np, prop_name, arr, count);
> +	if (ret) {
> +		kfree(arr);
> +		dev_warn(dev, "%s Invalid dt array property, err(%d)\n",

'err(%d)' is an unusual style for printing error numbers.  'error %d' looks
better.

Also in some messages you have 'DT' and others 'dt'.  Also here it is '%s'
but above '%s:', and some messages start with a lower case letter and some
upper case.  Please try to make everything consistent.

> +				prop_name, ret);
> +		return ret;
> +	}
> +	*table = arr;
> +	*size = count;
> +	return 0;
> +}
> +
> +void sdhci_msm_populate_dt(struct device *dev,
> +						struct sdhci_msm_host *msm_host)

Align to open parenthesis

> +{
> +	int table_sz = 0;
> +	u32 *table = NULL;
> +
> +	if (sdhci_msm_dt_get_array(dev, "clk-rates", &table, &table_sz)) {
> +		dev_warn(dev, "failed in DT parsing for supported clk-rates\n");
> +		return;
> +	}
> +	msm_host->clk_table = table;
> +	msm_host->clk_table_sz = table_sz;
> +}
> +
>  static int sdhci_msm_probe(struct platform_device *pdev)
>  {
>  	struct sdhci_host *host;
> @@ -608,6 +654,8 @@ static int sdhci_msm_probe(struct platform_device *pdev)
>  
>  	sdhci_get_of_property(pdev);
>  
> +	sdhci_msm_populate_dt(&pdev->dev, msm_host);
> +
>  	/* Setup SDCC bus voter clock. */
>  	msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus");
>  	if (!IS_ERR(msm_host->bus_clk)) {
> 


  reply	other threads:[~2016-10-10  9:35 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-05 14:40 [PATCH v5 00/12] mmc: sdhci-msm: Add clk-rates, DDR, HS400 support Ritesh Harjani
     [not found] ` <1475678440-3525-1-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-05 14:40   ` [PATCH v5 01/12] mmc: sdhci-msm: Change poor style writel/readl of registers Ritesh Harjani
2016-10-05 14:40   ` [PATCH v5 02/12] mmc: sdhci-msm: Update DLL reset sequence Ritesh Harjani
2016-10-05 14:40   ` [PATCH v5 10/12] mmc: sdhci-msm: Add HS400 platform support Ritesh Harjani
2016-10-10 12:08     ` Adrian Hunter
2016-10-10 15:26       ` Ritesh Harjani
2016-10-05 14:40   ` [PATCH v5 11/12] mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit Ritesh Harjani
2016-10-10 12:49     ` Adrian Hunter
     [not found]       ` <183c2e6a-179b-b042-aef9-d1e5cb90b17d-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2016-10-10 15:42         ` Ritesh Harjani
     [not found]           ` <6993d3a2-7961-2507-60d2-153c14e0bc17-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-11  6:39             ` Adrian Hunter
2016-10-11  9:09               ` Ritesh Harjani
2016-10-05 14:40 ` [PATCH v5 03/12] mmc: sdhci-msm: add pltfm_data support to get clk-rates from DT Ritesh Harjani
2016-10-10  9:35   ` Adrian Hunter [this message]
     [not found]     ` <7e5c2bfe-0a67-71e2-d083-49d9a712482e-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2016-10-10 11:00       ` Ritesh Harjani
     [not found]   ` <1475678440-3525-4-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-10 12:57     ` Rob Herring
2016-10-10 16:07       ` Ritesh Harjani
2016-10-10 19:29         ` Rob Herring
2016-10-11  9:06           ` Ritesh Harjani
2016-10-11 12:31             ` Rob Herring
2016-11-07 11:21               ` Ritesh Harjani
2016-10-05 14:40 ` [PATCH v5 04/12] ARM: dts: qcom: Add clk-rates to sdhc1 & sdhc2 Ritesh Harjani
2016-10-05 14:40 ` [PATCH v5 05/12] mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback Ritesh Harjani
2016-10-10  9:46   ` Adrian Hunter
2016-10-10 11:05     ` Ritesh Harjani
2016-10-05 14:40 ` [PATCH v5 06/12] mmc: sdhci-msm: Enable few quirks Ritesh Harjani
2016-10-05 14:40 ` [PATCH v5 07/12] mmc: sdhci-msm: Implement set_clock callback for sdhci-msm Ritesh Harjani
     [not found]   ` <1475678440-3525-8-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-10 10:16     ` Adrian Hunter
2016-10-10 10:23       ` Adrian Hunter
     [not found]         ` <d35224cf-52e0-5ccc-9596-1c338df41c36-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2016-10-10 11:17           ` Ritesh Harjani
2016-10-05 14:40 ` [PATCH v5 08/12] mmc: sdhci-msm: Add clock changes for DDR mode Ritesh Harjani
     [not found]   ` <1475678440-3525-9-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-10-10 10:26     ` Adrian Hunter
2016-10-05 14:40 ` [PATCH v5 09/12] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 Ritesh Harjani
2016-10-05 14:40 ` [PATCH v5 12/12] sdhci: sdhci-msm: update dll configuration Ritesh Harjani
2016-10-10 13:27   ` Adrian Hunter
2016-10-10 15:54     ` Ritesh Harjani

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