From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Agner Subject: Re: [PATCH 7/7] drm/fsl-dcu: use mode flags for hsync/vsync pixelclk polarity Date: Wed, 03 Feb 2016 15:30:59 -0800 Message-ID: <7ffa4e731477aeb8066054b4366cfd25@agner.ch> References: <1447900970-15936-1-git-send-email-stefan@agner.ch> <1447900970-15936-8-git-send-email-stefan@agner.ch> <20160203140438.GB9650@ulmo> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail.kmu-office.ch (mail.kmu-office.ch [178.209.48.109]) by gabe.freedesktop.org (Postfix) with ESMTPS id AE95F6E0DC for ; Wed, 3 Feb 2016 15:33:24 -0800 (PST) In-Reply-To: <20160203140438.GB9650@ulmo> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Thierry Reding Cc: alison.wang@freescale.com, daniel.vetter@ffwll.ch, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Shawn Guo List-Id: dri-devel@lists.freedesktop.org T24gMjAxNi0wMi0wMyAwNjowNCwgVGhpZXJyeSBSZWRpbmcgd3JvdGU6Cj4gT24gV2VkLCBKYW4g MjcsIDIwMTYgYXQgMDY6NDY6NTBQTSAtMDgwMCwgU3RlZmFuIEFnbmVyIHdyb3RlOgo+IFsuLi5d Cj4+IE9uIDIwMTUtMTEtMTggMTg6NDIsIFN0ZWZhbiBBZ25lciB3cm90ZToKPiBbLi4uXQo+PiA+ IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vZnNsLWRjdS9mc2xfZGN1X2RybV9jcnRjLmMK PiBbLi4uXQo+PiA+IEBAIC04OSw2ICs5MSwxNSBAQCBzdGF0aWMgdm9pZCBmc2xfZGN1X2RybV9j cnRjX21vZGVfc2V0X25vZmIoc3RydWN0Cj4+ID4gZHJtX2NydGMgKmNydGMpCj4+ID4gIAl2ZnAg PSBtb2RlLT52c3luY19zdGFydCAtIG1vZGUtPnZkaXNwbGF5Owo+PiA+ICAJdnN3ID0gbW9kZS0+ dnN5bmNfZW5kIC0gbW9kZS0+dnN5bmNfc3RhcnQ7Cj4+ID4KPj4gPiArCWlmICghKG1vZGUtPmZs YWdzICYgRElTUExBWV9GTEFHU19QSVhEQVRBX1BPU0VER0UpKQo+PiA+ICsJCXBvbCB8PSBEQ1Vf U1lOX1BPTF9JTlZfUFhDS19GQUxMOwo+PiA+ICsKPj4gPiArCWlmIChtb2RlLT5mbGFncyAmIERS TV9NT0RFX0ZMQUdfTkhTWU5DKQo+PiA+ICsJCXBvbCB8PSBEQ1VfU1lOX1BPTF9JTlZfSFNfTE9X Owo+PiA+ICsKPj4gPiArCWlmIChtb2RlLT5mbGFncyAmIERSTV9NT0RFX0ZMQUdfTkhTWU5DKQo+ PiA+ICsJCXBvbCB8PSBEQ1VfU1lOX1BPTF9JTlZfVlNfTE9XOwo+IAo+IEkgc3VzcGVjdCB0aGF0 IHlvdSB3YW50IHRvIGNoZWNrIGZvciBEUk1fTU9ERV9GTEFHX05WU1lOQyBoZXJlIGluc3RlYWQu Cj4gCgpVcHMsIHllcy4KCj4+ID4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9mc2wtZGN1 L2ZzbF9kY3VfZHJtX2Rydi5oCj4+ID4gYi9kcml2ZXJzL2dwdS9kcm0vZnNsLWRjdS9mc2xfZGN1 X2RybV9kcnYuaAo+PiA+IGluZGV4IDY0MTNhYzkuLjJhNzI0ZjMgMTAwNjQ0Cj4+ID4gLS0tIGEv ZHJpdmVycy9ncHUvZHJtL2ZzbC1kY3UvZnNsX2RjdV9kcm1fZHJ2LmgKPj4gPiArKysgYi9kcml2 ZXJzL2dwdS9kcm0vZnNsLWRjdS9mc2xfZGN1X2RybV9kcnYuaAo+PiA+IEBAIC00Nyw4ICs0Nyw4 IEBACj4+ID4gICNkZWZpbmUgRENVX1ZTWU5fUEFSQV9GUCh4KQkJKHgpCj4+ID4KPj4gPiAgI2Rl ZmluZSBEQ1VfU1lOX1BPTAkJCTB4MDAyNAo+PiA+IC0jZGVmaW5lIERDVV9TWU5fUE9MX0lOVl9Q WENLX0ZBTEwJKDAgPDwgNikKPj4gPiAtI2RlZmluZSBEQ1VfU1lOX1BPTF9ORUdfUkVNQUlOCQko MCA8PCA1KQo+PiA+ICsjZGVmaW5lIERDVV9TWU5fUE9MX0lOVl9QWENLX0ZBTEwJQklUKDYpCj4+ ID4gKyNkZWZpbmUgRENVX1NZTl9QT0xfTkVHX1JFTUFJTgkJQklUKDUpCj4gCj4gSSBkb24ndCB1 bmRlcnN0YW5kIHRoZXNlIGNoYW5nZXMuIFlvdSdyZSBpbiBmYWN0IGNoYW5naW5nIHRoZSB2YWx1 ZXMgZm9yCj4gdGhlc2UgZGVmaW5lcywgYnV0IGl0J3Mgbm90IG1lbnRpb25lZCBpbiB0aGUgY29t bWl0IG1lc3NhZ2UuIEl0IGFsc28KPiBzZWVtcyBsaWtlIGl0IHNob3VsZCBiZSBhIHNlcGFyYXRl IHBhdGNoIGJlY2F1c2UgaXQgaXNuJ3QgcmVsYXRlZCB0byB0aGUKPiBtb2RlIGZsYWdzIGNoYW5n ZXMgaW4gdGhlIHJlbWFpbmRlciBvZiB0aGUgcGF0Y2guCgpZZXMsIGluIG9yZGVyIHRvIHNldCB0 aGVtLCBJIG5lZWQgdGhlbSB0byBiZSBwb3NpdGl2ZSwgdGhlcmUgaXMgbm8gdXNlCmlmIHRoZXkg YXJlIHplcm8uLi4gVGhleSBoYXZlbid0IGJlZW4gdXNlZCBhdCBhbGwgc28gZmFyLCBzbyB0aGVy ZSBpcyBubwppc3N1ZSBpbiBjaGFuZ2luZyB0aGVpciB2YWx1ZS4gSnVzdCByZWFsaXplZCB0aGF0 IHRoZWlyIG5hbWluZyBpcwphY3R1YWxseSByZWxhdGVkIHRvIHRoZSAwIHZhbHVlLCBzbyBJIHBy b2JhYmx5IHNob3VsZCByZW5hbWUgdGhlbSB0bwpqdXN0IHJlZmxlY3QgdGhlIGZpZWxkIG5hbWUK CiNkZWZpbmUgRENVX1NZTl9QT0xfSU5WX1BYQ0sJQklUKDYpCiNkZWZpbmUgRENVX1NZTl9QT0xf TkVHCQlCSVQoNSkKCi0tClN0ZWZhbgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVl ZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZv L2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756987AbcBCXd1 (ORCPT ); Wed, 3 Feb 2016 18:33:27 -0500 Received: from mail.kmu-office.ch ([178.209.48.109]:43846 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755127AbcBCXdY (ORCPT ); Wed, 3 Feb 2016 18:33:24 -0500 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Date: Wed, 03 Feb 2016 15:30:59 -0800 From: Stefan Agner To: Thierry Reding Cc: airlied@gmail.com, alison.wang@freescale.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, airlied@linux.ie, daniel.vetter@ffwll.ch, jianwei.wang.chn@gmail.com, Shawn Guo Subject: Re: [PATCH 7/7] drm/fsl-dcu: use mode flags for hsync/vsync pixelclk polarity In-Reply-To: <20160203140438.GB9650@ulmo> References: <1447900970-15936-1-git-send-email-stefan@agner.ch> <1447900970-15936-8-git-send-email-stefan@agner.ch> <20160203140438.GB9650@ulmo> Message-ID: <7ffa4e731477aeb8066054b4366cfd25@agner.ch> User-Agent: Roundcube Webmail/1.1.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2016-02-03 06:04, Thierry Reding wrote: > On Wed, Jan 27, 2016 at 06:46:50PM -0800, Stefan Agner wrote: > [...] >> On 2015-11-18 18:42, Stefan Agner wrote: > [...] >> > diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c > [...] >> > @@ -89,6 +91,15 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct >> > drm_crtc *crtc) >> > vfp = mode->vsync_start - mode->vdisplay; >> > vsw = mode->vsync_end - mode->vsync_start; >> > >> > + if (!(mode->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)) >> > + pol |= DCU_SYN_POL_INV_PXCK_FALL; >> > + >> > + if (mode->flags & DRM_MODE_FLAG_NHSYNC) >> > + pol |= DCU_SYN_POL_INV_HS_LOW; >> > + >> > + if (mode->flags & DRM_MODE_FLAG_NHSYNC) >> > + pol |= DCU_SYN_POL_INV_VS_LOW; > > I suspect that you want to check for DRM_MODE_FLAG_NVSYNC here instead. > Ups, yes. >> > diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h >> > b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h >> > index 6413ac9..2a724f3 100644 >> > --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h >> > +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h >> > @@ -47,8 +47,8 @@ >> > #define DCU_VSYN_PARA_FP(x) (x) >> > >> > #define DCU_SYN_POL 0x0024 >> > -#define DCU_SYN_POL_INV_PXCK_FALL (0 << 6) >> > -#define DCU_SYN_POL_NEG_REMAIN (0 << 5) >> > +#define DCU_SYN_POL_INV_PXCK_FALL BIT(6) >> > +#define DCU_SYN_POL_NEG_REMAIN BIT(5) > > I don't understand these changes. You're in fact changing the values for > these defines, but it's not mentioned in the commit message. It also > seems like it should be a separate patch because it isn't related to the > mode flags changes in the remainder of the patch. Yes, in order to set them, I need them to be positive, there is no use if they are zero... They haven't been used at all so far, so there is no issue in changing their value. Just realized that their naming is actually related to the 0 value, so I probably should rename them to just reflect the field name #define DCU_SYN_POL_INV_PXCK BIT(6) #define DCU_SYN_POL_NEG BIT(5) -- Stefan