From mboxrd@z Thu Jan 1 00:00:00 1970 From: khilman@baylibre.com (Kevin Hilman) Date: Mon, 17 Oct 2016 09:57:08 -0700 Subject: [PATCH 2/3] ARM: bus: da8xx-syscfg: new driver In-Reply-To: <1476721850-454-3-git-send-email-bgolaszewski@baylibre.com> (Bartosz Golaszewski's message of "Mon, 17 Oct 2016 18:30:49 +0200") References: <1476721850-454-1-git-send-email-bgolaszewski@baylibre.com> <1476721850-454-3-git-send-email-bgolaszewski@baylibre.com> Message-ID: <7h37judicb.fsf@baylibre.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Bartosz Golaszewski writes: > Create the driver for the da8xx System Configuration and implement > support for writing to the three Master Priority registers. > > Signed-off-by: Bartosz Golaszewski [...] > +#define DA8XX_IO_PHYS 0x01c00000ul > +#define DA8XX_SYSCFG0_BASE (DA8XX_IO_PHYS + 0x14000) The base addr should come from DT. Kevin From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kevin Hilman Subject: Re: [PATCH 2/3] ARM: bus: da8xx-syscfg: new driver Date: Mon, 17 Oct 2016 09:57:08 -0700 Message-ID: <7h37judicb.fsf@baylibre.com> References: <1476721850-454-1-git-send-email-bgolaszewski@baylibre.com> <1476721850-454-3-git-send-email-bgolaszewski@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1476721850-454-3-git-send-email-bgolaszewski@baylibre.com> (Bartosz Golaszewski's message of "Mon, 17 Oct 2016 18:30:49 +0200") List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Bartosz Golaszewski Cc: Mark Rutland , linux-devicetree , Tomi Valkeinen , Michael Turquette , Sekhar Nori , Russell King , linux-drm , LKML , Peter Ujfalusi , Rob Herring , Jyri Sarha , Frank Rowand , arm-soc , Laurent Pinchart List-Id: devicetree@vger.kernel.org QmFydG9zeiBHb2xhc3pld3NraSA8YmdvbGFzemV3c2tpQGJheWxpYnJlLmNvbT4gd3JpdGVzOgoK PiBDcmVhdGUgdGhlIGRyaXZlciBmb3IgdGhlIGRhOHh4IFN5c3RlbSBDb25maWd1cmF0aW9uIGFu ZCBpbXBsZW1lbnQKPiBzdXBwb3J0IGZvciB3cml0aW5nIHRvIHRoZSB0aHJlZSBNYXN0ZXIgUHJp b3JpdHkgcmVnaXN0ZXJzLgo+Cj4gU2lnbmVkLW9mZi1ieTogQmFydG9zeiBHb2xhc3pld3NraSA8 YmdvbGFzemV3c2tpQGJheWxpYnJlLmNvbT4KClsuLi5dCgo+ICsjZGVmaW5lIERBOFhYX0lPX1BI WVMJCQkweDAxYzAwMDAwdWwKPiArI2RlZmluZSBEQThYWF9TWVNDRkcwX0JBU0UJCShEQThYWF9J T19QSFlTICsgMHgxNDAwMCkKClRoZSBiYXNlIGFkZHIgc2hvdWxkIGNvbWUgZnJvbSBEVC4KCktl dmluCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1k ZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczov L2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936361AbcJQRBa (ORCPT ); Mon, 17 Oct 2016 13:01:30 -0400 Received: from mail-pf0-f182.google.com ([209.85.192.182]:33406 "EHLO mail-pf0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757907AbcJQQ5K (ORCPT ); Mon, 17 Oct 2016 12:57:10 -0400 From: Kevin Hilman To: Bartosz Golaszewski Cc: Michael Turquette , Sekhar Nori , Rob Herring , Frank Rowand , Mark Rutland , Peter Ujfalusi , Russell King , LKML , arm-soc , linux-drm , linux-devicetree , Jyri Sarha , Tomi Valkeinen , David Airlie , Laurent Pinchart Subject: Re: [PATCH 2/3] ARM: bus: da8xx-syscfg: new driver Organization: BayLibre References: <1476721850-454-1-git-send-email-bgolaszewski@baylibre.com> <1476721850-454-3-git-send-email-bgolaszewski@baylibre.com> Date: Mon, 17 Oct 2016 09:57:08 -0700 In-Reply-To: <1476721850-454-3-git-send-email-bgolaszewski@baylibre.com> (Bartosz Golaszewski's message of "Mon, 17 Oct 2016 18:30:49 +0200") Message-ID: <7h37judicb.fsf@baylibre.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Bartosz Golaszewski writes: > Create the driver for the da8xx System Configuration and implement > support for writing to the three Master Priority registers. > > Signed-off-by: Bartosz Golaszewski [...] > +#define DA8XX_IO_PHYS 0x01c00000ul > +#define DA8XX_SYSCFG0_BASE (DA8XX_IO_PHYS + 0x14000) The base addr should come from DT. Kevin