From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kevin Hilman Subject: Re: [PATCH] ARM: OMAP4+: PM: Program CPU logic power state Date: Fri, 24 Oct 2014 11:03:31 -0700 Message-ID: <7h61f98hvw.fsf@deeprootsystems.com> References: <1413923076-26063-1-git-send-email-nm@ti.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1413923076-26063-1-git-send-email-nm@ti.com> (Nishanth Menon's message of "Tue, 21 Oct 2014 15:24:36 -0500") Sender: linux-kernel-owner@vger.kernel.org To: Nishanth Menon Cc: Tony Lindgren , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, Tero Kristo List-Id: linux-omap@vger.kernel.org Nishanth Menon writes: > CPU logic power state is never programmed in either the initialization > or the suspend/resume logic, instead, we depend on mpuss to program this > properly. However, this leaves CPU logic power state indeterminate and > most probably in reset configuration (If bootloader or other similar > software have'nt monkeyed with the register). This can make powerstate= > RET be either programmed for CSWR (logic=ret) or OSWR(logic = OFF) and > in OSWR, there can be context loss when the code does not expect it. > > To prevent all these confusions, just support clearly ON, INA, CSWR, > OFF which is the intent of the existing code by explicitly programming > logic state. > > NOTE: since this is a hot path (using in cpuidle), the exit path just > programs powerstate (logic state is immaterial when powerstate is ON). > > Without doing this, we end up with lockups when CPUs enter OSWR and > multiple blocks loose context, when we expect them to hit CSWR. > > Signed-off-by: Nishanth Menon Acked-by: Kevin Hilman From mboxrd@z Thu Jan 1 00:00:00 1970 From: khilman@kernel.org (Kevin Hilman) Date: Fri, 24 Oct 2014 11:03:31 -0700 Subject: [PATCH] ARM: OMAP4+: PM: Program CPU logic power state In-Reply-To: <1413923076-26063-1-git-send-email-nm@ti.com> (Nishanth Menon's message of "Tue, 21 Oct 2014 15:24:36 -0500") References: <1413923076-26063-1-git-send-email-nm@ti.com> Message-ID: <7h61f98hvw.fsf@deeprootsystems.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Nishanth Menon writes: > CPU logic power state is never programmed in either the initialization > or the suspend/resume logic, instead, we depend on mpuss to program this > properly. However, this leaves CPU logic power state indeterminate and > most probably in reset configuration (If bootloader or other similar > software have'nt monkeyed with the register). This can make powerstate= > RET be either programmed for CSWR (logic=ret) or OSWR(logic = OFF) and > in OSWR, there can be context loss when the code does not expect it. > > To prevent all these confusions, just support clearly ON, INA, CSWR, > OFF which is the intent of the existing code by explicitly programming > logic state. > > NOTE: since this is a hot path (using in cpuidle), the exit path just > programs powerstate (logic state is immaterial when powerstate is ON). > > Without doing this, we end up with lockups when CPUs enter OSWR and > multiple blocks loose context, when we expect them to hit CSWR. > > Signed-off-by: Nishanth Menon Acked-by: Kevin Hilman From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756973AbaJXSDh (ORCPT ); Fri, 24 Oct 2014 14:03:37 -0400 Received: from mail-pa0-f48.google.com ([209.85.220.48]:42746 "EHLO mail-pa0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756750AbaJXSDg (ORCPT ); Fri, 24 Oct 2014 14:03:36 -0400 From: Kevin Hilman To: Nishanth Menon Cc: Tony Lindgren , , , , Tero Kristo Subject: Re: [PATCH] ARM: OMAP4+: PM: Program CPU logic power state References: <1413923076-26063-1-git-send-email-nm@ti.com> Date: Fri, 24 Oct 2014 11:03:31 -0700 In-Reply-To: <1413923076-26063-1-git-send-email-nm@ti.com> (Nishanth Menon's message of "Tue, 21 Oct 2014 15:24:36 -0500") Message-ID: <7h61f98hvw.fsf@deeprootsystems.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Nishanth Menon writes: > CPU logic power state is never programmed in either the initialization > or the suspend/resume logic, instead, we depend on mpuss to program this > properly. However, this leaves CPU logic power state indeterminate and > most probably in reset configuration (If bootloader or other similar > software have'nt monkeyed with the register). This can make powerstate= > RET be either programmed for CSWR (logic=ret) or OSWR(logic = OFF) and > in OSWR, there can be context loss when the code does not expect it. > > To prevent all these confusions, just support clearly ON, INA, CSWR, > OFF which is the intent of the existing code by explicitly programming > logic state. > > NOTE: since this is a hot path (using in cpuidle), the exit path just > programs powerstate (logic state is immaterial when powerstate is ON). > > Without doing this, we end up with lockups when CPUs enter OSWR and > multiple blocks loose context, when we expect them to hit CSWR. > > Signed-off-by: Nishanth Menon Acked-by: Kevin Hilman