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[71.197.186.152]) by smtp.gmail.com with ESMTPSA id z12-20020aa785cc000000b0050dc762818bsm1714033pfn.101.2022.05.26.09.28.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 May 2022 09:28:49 -0700 (PDT) From: Kevin Hilman To: Liang Yang , Miquel Raynal , linux-mtd@lists.infradead.org Cc: Liang Yang , Rob Herring , Richard Weinberger , Vignesh Raghavendra , Jerome Brunet , Neil Armstrong , Martin Blumenstingl , Jianxin Pan , Victor Wan , XianWei Zhao , Kelvin Zhang , BiChao Zheng , YongHui Yu , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 2/4] mtd: rawnand: meson: fix the clock In-Reply-To: <20220513123404.48513-3-liang.yang@amlogic.com> References: <20220513123404.48513-1-liang.yang@amlogic.com> <20220513123404.48513-3-liang.yang@amlogic.com> Date: Thu, 26 May 2022 09:28:49 -0700 Message-ID: <7hwne88dha.fsf@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220526_092852_243091_A8D869DD X-CRM114-Status: GOOD ( 11.99 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi Liang, Liang Yang writes: > EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK' > which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is > the divider and bit6~7 is the mux for fix pll and xtal. At the beginning, > a common MMC and NAND sub-clock was discussed and planed to be implemented > as NFC clock provider, but now this series of patches of a common MMC and > NAND sub-clock are never being accepted. the reasons for giving up are: > 1. EMMC and NAND, which are mutually exclusive anyway > 2. coupling the EMMC and NAND. > 3. it seems that a common MMC and NAND sub-clock is over engineered. > and let us see the link fot more information: > https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com > so The meson nfc can't work now, let us rework the clock. > > Signed-off-by: Liang Yang Reviewed-by: Kevin Hilman Thank you for your persistence in working on multiple iterations of this until we came to a final agreement. Kevin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8E67FC433EF for ; Thu, 26 May 2022 16:29:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:References :In-Reply-To:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SK0TbGSL+wcY1xuHOn0k6b5AmngGFLE9y5p4dKIFwvU=; b=iIYoxZlam3FRW4 EUOpo/avEcxMVr8qylznHayb/jvsn2g0oMVG7wQTTqWkQNfsHKU1TRpDLWKzkXEDRAs5iYl1juYrw IftxHLuVbdyf20cnHHIChTNDjePwikcAuI9tRkK07EBY1jImiM9sB63q5WTFp/4+ILJsiX1lciJ8Z GIxHI86wqENGfmAOh7AydYJ6mOWcy7Czkg92S32hd017USk2MD82vhrEkyxhfZUTwag8IgZ1jzDdV wIFh+Rjcm/mGmN75zfoe9WqIvaXjxQoMC3phVFHb2313VglzFFvXZrqnsSKDjxKEG5E83cz383wNt tq0gg6IUkmaG1drIaYIQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nuGM4-00FPDb-I6; Thu, 26 May 2022 16:28:56 +0000 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nuGM1-00FPBY-Ct for linux-mtd@lists.infradead.org; Thu, 26 May 2022 16:28:54 +0000 Received: by mail-pf1-x430.google.com with SMTP id b135so2072954pfb.12 for ; Thu, 26 May 2022 09:28:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:in-reply-to:references:date:message-id :mime-version; bh=ZV2y77FSAdklT7BKF+Tws43T4buN/hfHfm1U5B1OUTY=; b=2l+TLfCq3eeZ8fnL4KvNPyIePz/kfWJ3xDqUw9rjbwjbepocHIx4xOokRfKmQZXcjq sB5yKd3QPZI5WpbmUONnogFtTwkfTufAtkNQonFhta858pKIj2mrLBfwaThv1XLZ5qUw HKIfY772DkudNhL4y/3qsv/BKNLOeELnYiOseGovKA4UxOyeMFRh4NyVQGIC8uqaGZim 9DhOn5r6/7Sk/fsjJsyGjQPLb6Cq8vkxTNiyMwYleEyaUXMu9ZHZuHnsnYj9aY4063pL anmx7dkc0QrcCB3o/tKUCMuIy3+/gM0QRdQoNMrZ6w6nZ8SVa+ajkscjDC/GqA7XbnmK m6rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:in-reply-to:references:date :message-id:mime-version; bh=ZV2y77FSAdklT7BKF+Tws43T4buN/hfHfm1U5B1OUTY=; b=rY/04x974P5BTaWBwpk2wXV6ak0ir/cOwIU1T/QStPcAHPvqOqCW6DsRKRGc6p77Dj wDAjwYN9/ExO4DNJGRm2KZRl9b0nQaTiwSSCtVdZHG3zz9AfEH0WBf54tHeJPd9ACRPZ 6sW0FvrNApBxfEMlD9i46HW9KNVVVWedoaRCuihNQozXR6eVFfgZGJYnFYkp5lTTlRiz uZTlq9tjpKlh0RsI6ucW5RkYMqkWaBORi/jLvv7XRAls8HWFF2Wht3MmOOqm9d736dVw s4YT6UuR5PcIpIoIQwUoF7/qxK0t0NV4OxO74+1MLcq4oWImQIyIYIgBGiDT6gaqXnoM 8wdA== X-Gm-Message-State: AOAM530rKnPWJM1KlfNrLngtefc6uDbQQObx5/QtH3tgz6L98XZ5WyQU zK69fRb4vdToKYeUr6uDyOVM6w== X-Google-Smtp-Source: ABdhPJzsd/UhDYfCsKi9Q0HQ1PX++LTeTnaX8uCbHKcHAw1xfbhM6zfM0BCJpYZwUgFFGZu7q+LWNw== X-Received: by 2002:a05:6a00:15c2:b0:518:9911:4952 with SMTP id o2-20020a056a0015c200b0051899114952mr22033146pfu.64.1653582530334; Thu, 26 May 2022 09:28:50 -0700 (PDT) Received: from localhost (c-71-197-186-152.hsd1.wa.comcast.net. [71.197.186.152]) by smtp.gmail.com with ESMTPSA id z12-20020aa785cc000000b0050dc762818bsm1714033pfn.101.2022.05.26.09.28.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 May 2022 09:28:49 -0700 (PDT) From: Kevin Hilman To: Liang Yang , Miquel Raynal , linux-mtd@lists.infradead.org Cc: Liang Yang , Rob Herring , Richard Weinberger , Vignesh Raghavendra , Jerome Brunet , Neil Armstrong , Martin Blumenstingl , Jianxin Pan , Victor Wan , XianWei Zhao , Kelvin Zhang , BiChao Zheng , YongHui Yu , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 2/4] mtd: rawnand: meson: fix the clock In-Reply-To: <20220513123404.48513-3-liang.yang@amlogic.com> References: <20220513123404.48513-1-liang.yang@amlogic.com> <20220513123404.48513-3-liang.yang@amlogic.com> Date: Thu, 26 May 2022 09:28:49 -0700 Message-ID: <7hwne88dha.fsf@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220526_092853_487052_C557E769 X-CRM114-Status: GOOD ( 12.34 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org Hi Liang, Liang Yang writes: > EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK' > which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is > the divider and bit6~7 is the mux for fix pll and xtal. At the beginning, > a common MMC and NAND sub-clock was discussed and planed to be implemented > as NFC clock provider, but now this series of patches of a common MMC and > NAND sub-clock are never being accepted. the reasons for giving up are: > 1. EMMC and NAND, which are mutually exclusive anyway > 2. coupling the EMMC and NAND. > 3. it seems that a common MMC and NAND sub-clock is over engineered. > and let us see the link fot more information: > https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com > so The meson nfc can't work now, let us rework the clock. > > Signed-off-by: Liang Yang Reviewed-by: Kevin Hilman Thank you for your persistence in working on multiple iterations of this until we came to a final agreement. Kevin ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A029FC433F5 for ; Thu, 26 May 2022 16:30:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:References :In-Reply-To:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2QB8m7IfRnPHH+kUpukB/PCPRP/0590ZceAxBoSh1/w=; b=FoCADQdCCFf9Fk DCm5+5LqYtLsdEqQNDoNJB8U6UFbZ4qA0LvfRGyH63GFFt6hMAdzIOuWcL1ED0luD3hWYlj7m5qk5 e2S5rKRENDbMilwtPKTvY8pvN0Afmbd7O/KIPcaSgoy3fkQKR2j5R0t6pljsd30jQkW7s6y+gI4Cg SKFwr5tvVdWULh8e/TTrCgft61pRTFHcGcp+JRGgE2yGiqlqNTaOx0VHZ4I9i+SzG+dkPJELhgW7T ZYsPaIq+r2CT3yWuPmI15Snpi8B6OQsnOxJlSw6JujDgLEcRwGwSBx5vw1NGMIVhkt12rII8A34nA biIz8nFhnHoxGF9bGMpQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nuGM6-00FPEO-TJ; Thu, 26 May 2022 16:28:59 +0000 Received: from mail-pf1-x42d.google.com ([2607:f8b0:4864:20::42d]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nuGM1-00FPBZ-Cx for linux-arm-kernel@lists.infradead.org; Thu, 26 May 2022 16:28:54 +0000 Received: by mail-pf1-x42d.google.com with SMTP id f21so2109233pfa.3 for ; Thu, 26 May 2022 09:28:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:in-reply-to:references:date:message-id :mime-version; bh=ZV2y77FSAdklT7BKF+Tws43T4buN/hfHfm1U5B1OUTY=; b=2l+TLfCq3eeZ8fnL4KvNPyIePz/kfWJ3xDqUw9rjbwjbepocHIx4xOokRfKmQZXcjq sB5yKd3QPZI5WpbmUONnogFtTwkfTufAtkNQonFhta858pKIj2mrLBfwaThv1XLZ5qUw HKIfY772DkudNhL4y/3qsv/BKNLOeELnYiOseGovKA4UxOyeMFRh4NyVQGIC8uqaGZim 9DhOn5r6/7Sk/fsjJsyGjQPLb6Cq8vkxTNiyMwYleEyaUXMu9ZHZuHnsnYj9aY4063pL anmx7dkc0QrcCB3o/tKUCMuIy3+/gM0QRdQoNMrZ6w6nZ8SVa+ajkscjDC/GqA7XbnmK m6rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:in-reply-to:references:date :message-id:mime-version; bh=ZV2y77FSAdklT7BKF+Tws43T4buN/hfHfm1U5B1OUTY=; b=fCP6lsjqewKoWTZCUVtGoE1yqV5sMyt1xu/rNe8wmosfEqLuS3a3jr2zmSleq0SOnp QrrPw/LP358J9A0XiX/N/7z94SHc6eyuYOUywHWecH+i1cLvArlGxDiZ9KNkalOXIj+a FGo0ZXF18fwK0uGrY1qNrnqFcF0qOC8z3j4M4I05c9XHfrG2RUnV8oXr3hTk0d5jTjy2 J3EQAVk+vinnzUU1JIeO2RkBdLqKsF5+AxI9KkjZnBbop+btwfQSmARPLykgHkkme3Mx SRkH/HX5bybIopjjvEwUhcKJA9fuxiLXmo0txzUe9TNu1zQRnmnOHUBDXGY3aFDeV1aq Pz5g== X-Gm-Message-State: AOAM533sjrf0xaV5QHY2UFM53dz7F4UPFLM2FLWsOx7br3Z4T2m18FOI DBYkNWVDLM7oem/LyenfC2duFg== X-Google-Smtp-Source: ABdhPJzsd/UhDYfCsKi9Q0HQ1PX++LTeTnaX8uCbHKcHAw1xfbhM6zfM0BCJpYZwUgFFGZu7q+LWNw== X-Received: by 2002:a05:6a00:15c2:b0:518:9911:4952 with SMTP id o2-20020a056a0015c200b0051899114952mr22033146pfu.64.1653582530334; Thu, 26 May 2022 09:28:50 -0700 (PDT) Received: from localhost (c-71-197-186-152.hsd1.wa.comcast.net. [71.197.186.152]) by smtp.gmail.com with ESMTPSA id z12-20020aa785cc000000b0050dc762818bsm1714033pfn.101.2022.05.26.09.28.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 May 2022 09:28:49 -0700 (PDT) From: Kevin Hilman To: Liang Yang , Miquel Raynal , linux-mtd@lists.infradead.org Cc: Liang Yang , Rob Herring , Richard Weinberger , Vignesh Raghavendra , Jerome Brunet , Neil Armstrong , Martin Blumenstingl , Jianxin Pan , Victor Wan , XianWei Zhao , Kelvin Zhang , BiChao Zheng , YongHui Yu , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 2/4] mtd: rawnand: meson: fix the clock In-Reply-To: <20220513123404.48513-3-liang.yang@amlogic.com> References: <20220513123404.48513-1-liang.yang@amlogic.com> <20220513123404.48513-3-liang.yang@amlogic.com> Date: Thu, 26 May 2022 09:28:49 -0700 Message-ID: <7hwne88dha.fsf@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220526_092853_486457_9FAC7E3B X-CRM114-Status: GOOD ( 12.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Liang, Liang Yang writes: > EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK' > which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is > the divider and bit6~7 is the mux for fix pll and xtal. At the beginning, > a common MMC and NAND sub-clock was discussed and planed to be implemented > as NFC clock provider, but now this series of patches of a common MMC and > NAND sub-clock are never being accepted. the reasons for giving up are: > 1. EMMC and NAND, which are mutually exclusive anyway > 2. coupling the EMMC and NAND. > 3. it seems that a common MMC and NAND sub-clock is over engineered. > and let us see the link fot more information: > https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com > so The meson nfc can't work now, let us rework the clock. > > Signed-off-by: Liang Yang Reviewed-by: Kevin Hilman Thank you for your persistence in working on multiple iterations of this until we came to a final agreement. Kevin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B3E8C433EF for ; Thu, 26 May 2022 16:28:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347796AbiEZQ24 (ORCPT ); Thu, 26 May 2022 12:28:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229780AbiEZQ2w (ORCPT ); Thu, 26 May 2022 12:28:52 -0400 Received: from mail-pg1-x52f.google.com (mail-pg1-x52f.google.com [IPv6:2607:f8b0:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E494C7B9FF for ; Thu, 26 May 2022 09:28:50 -0700 (PDT) Received: by mail-pg1-x52f.google.com with SMTP id 137so1719888pgb.5 for ; Thu, 26 May 2022 09:28:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:in-reply-to:references:date:message-id :mime-version; bh=ZV2y77FSAdklT7BKF+Tws43T4buN/hfHfm1U5B1OUTY=; b=2l+TLfCq3eeZ8fnL4KvNPyIePz/kfWJ3xDqUw9rjbwjbepocHIx4xOokRfKmQZXcjq sB5yKd3QPZI5WpbmUONnogFtTwkfTufAtkNQonFhta858pKIj2mrLBfwaThv1XLZ5qUw HKIfY772DkudNhL4y/3qsv/BKNLOeELnYiOseGovKA4UxOyeMFRh4NyVQGIC8uqaGZim 9DhOn5r6/7Sk/fsjJsyGjQPLb6Cq8vkxTNiyMwYleEyaUXMu9ZHZuHnsnYj9aY4063pL anmx7dkc0QrcCB3o/tKUCMuIy3+/gM0QRdQoNMrZ6w6nZ8SVa+ajkscjDC/GqA7XbnmK m6rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:in-reply-to:references:date :message-id:mime-version; bh=ZV2y77FSAdklT7BKF+Tws43T4buN/hfHfm1U5B1OUTY=; b=Fpv8ZKh8VUrAMgBiHveCgyzsIhWSmq8Okwf9QMY7egsGaLTWcyEXYfsBIjurZAa9xb AmYFHi1Qk4RuHDfdM65dL5JtUzBqoR354kpwD/lXH3fhKN/zOVQbqRO4DoMWjfq+mcJR rWvw6WifTJT6u3ISgDtnu9+NhLkXau4FJmsw4lWAe2vIpjJDZKRWFd9GDQraaPqJTyr9 qmMQ1e+n3uBVAkHOWQjnafWUZ0hWBP41zw0/0tX4djpVGpgteqvb/49PJJyP75BsVooW 98GKM2hg5uHOknmzklDEWBb5JL3RSlP8tLgnVIiY96MZzCPwzHJSU1ww1B9WX9wGz2ES dU6g== X-Gm-Message-State: AOAM532csenTrC6+QMAsTvDc20V/tpNZhTRlsXJKHNobtkMBz619nROS haLcVZByXQeVCf9eLZTB3h/ZfA== X-Google-Smtp-Source: ABdhPJzsd/UhDYfCsKi9Q0HQ1PX++LTeTnaX8uCbHKcHAw1xfbhM6zfM0BCJpYZwUgFFGZu7q+LWNw== X-Received: by 2002:a05:6a00:15c2:b0:518:9911:4952 with SMTP id o2-20020a056a0015c200b0051899114952mr22033146pfu.64.1653582530334; Thu, 26 May 2022 09:28:50 -0700 (PDT) Received: from localhost (c-71-197-186-152.hsd1.wa.comcast.net. [71.197.186.152]) by smtp.gmail.com with ESMTPSA id z12-20020aa785cc000000b0050dc762818bsm1714033pfn.101.2022.05.26.09.28.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 May 2022 09:28:49 -0700 (PDT) From: Kevin Hilman To: Liang Yang , Miquel Raynal , linux-mtd@lists.infradead.org Cc: Liang Yang , Rob Herring , Richard Weinberger , Vignesh Raghavendra , Jerome Brunet , Neil Armstrong , Martin Blumenstingl , Jianxin Pan , Victor Wan , XianWei Zhao , Kelvin Zhang , BiChao Zheng , YongHui Yu , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 2/4] mtd: rawnand: meson: fix the clock In-Reply-To: <20220513123404.48513-3-liang.yang@amlogic.com> References: <20220513123404.48513-1-liang.yang@amlogic.com> <20220513123404.48513-3-liang.yang@amlogic.com> Date: Thu, 26 May 2022 09:28:49 -0700 Message-ID: <7hwne88dha.fsf@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Liang, Liang Yang writes: > EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK' > which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is > the divider and bit6~7 is the mux for fix pll and xtal. At the beginning, > a common MMC and NAND sub-clock was discussed and planed to be implemented > as NFC clock provider, but now this series of patches of a common MMC and > NAND sub-clock are never being accepted. the reasons for giving up are: > 1. EMMC and NAND, which are mutually exclusive anyway > 2. coupling the EMMC and NAND. > 3. it seems that a common MMC and NAND sub-clock is over engineered. > and let us see the link fot more information: > https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com > so The meson nfc can't work now, let us rework the clock. > > Signed-off-by: Liang Yang Reviewed-by: Kevin Hilman Thank you for your persistence in working on multiple iterations of this until we came to a final agreement. Kevin