From mboxrd@z Thu Jan 1 00:00:00 1970 From: khilman@baylibre.com (Kevin Hilman) Date: Fri, 06 Oct 2017 14:24:11 -0700 Subject: [PATCH] ARM64: dts: meson-gxl-libretech-cc: enable saradc In-Reply-To: <20170905170955.13135-1-jbrunet@baylibre.com> (Jerome Brunet's message of "Tue, 5 Sep 2017 19:09:55 +0200") References: <20170905170955.13135-1-jbrunet@baylibre.com> Message-ID: <7hzi947yx0.fsf@baylibre.com> To: linus-amlogic@lists.infradead.org List-Id: linus-amlogic.lists.infradead.org Jerome Brunet writes: > Enable saradc and add the reference 1.8v regulator required. > The libretech-cc has saradc channel 0 and 2 available on the 2 first > pins of 2J3 header > > Signed-off-by: Jerome Brunet Appled to v4.15/dt64, Kevin From mboxrd@z Thu Jan 1 00:00:00 1970 From: khilman@baylibre.com (Kevin Hilman) Date: Fri, 06 Oct 2017 14:24:11 -0700 Subject: [PATCH] ARM64: dts: meson-gxl-libretech-cc: enable saradc In-Reply-To: <20170905170955.13135-1-jbrunet@baylibre.com> (Jerome Brunet's message of "Tue, 5 Sep 2017 19:09:55 +0200") References: <20170905170955.13135-1-jbrunet@baylibre.com> Message-ID: <7hzi947yx0.fsf@baylibre.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Jerome Brunet writes: > Enable saradc and add the reference 1.8v regulator required. > The libretech-cc has saradc channel 0 and 2 available on the 2 first > pins of 2J3 header > > Signed-off-by: Jerome Brunet Appled to v4.15/dt64, Kevin From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kevin Hilman Subject: Re: [PATCH] ARM64: dts: meson-gxl-libretech-cc: enable saradc Date: Fri, 06 Oct 2017 14:24:11 -0700 Message-ID: <7hzi947yx0.fsf@baylibre.com> References: <20170905170955.13135-1-jbrunet@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <20170905170955.13135-1-jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> (Jerome Brunet's message of "Tue, 5 Sep 2017 19:09:55 +0200") Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Jerome Brunet Cc: Carlo Caione , linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org Jerome Brunet writes: > Enable saradc and add the reference 1.8v regulator required. > The libretech-cc has saradc channel 0 and 2 available on the 2 first > pins of 2J3 header > > Signed-off-by: Jerome Brunet Appled to v4.15/dt64, Kevin -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752819AbdJFVY1 (ORCPT ); Fri, 6 Oct 2017 17:24:27 -0400 Received: from mail-pf0-f171.google.com ([209.85.192.171]:53341 "EHLO mail-pf0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751654AbdJFVYY (ORCPT ); Fri, 6 Oct 2017 17:24:24 -0400 X-Google-Smtp-Source: AOwi7QABg7V9fiISmJFFHsS3e24tbFL8XYDge+344g0kAv8NuMFvuVyC7Um92sdSvmUEwGCnPsBSCg== From: Kevin Hilman To: Jerome Brunet Cc: Carlo Caione , linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM64: dts: meson-gxl-libretech-cc: enable saradc Organization: BayLibre References: <20170905170955.13135-1-jbrunet@baylibre.com> Date: Fri, 06 Oct 2017 14:24:11 -0700 In-Reply-To: <20170905170955.13135-1-jbrunet@baylibre.com> (Jerome Brunet's message of "Tue, 5 Sep 2017 19:09:55 +0200") Message-ID: <7hzi947yx0.fsf@baylibre.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Jerome Brunet writes: > Enable saradc and add the reference 1.8v regulator required. > The libretech-cc has saradc channel 0 and 2 available on the 2 first > pins of 2J3 header > > Signed-off-by: Jerome Brunet Appled to v4.15/dt64, Kevin