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[62.73.104.42]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b42757sm14388525e9.39.2024.12.18.01.30.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 18 Dec 2024 01:30:33 -0800 (PST) Message-ID: <80d33e99-6a04-4985-b704-42d731313d9f@gmail.com> Date: Wed, 18 Dec 2024 11:30:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/2] dt-bindings: i2c: exynos5: Add samsung,exynos8895-hsi2c compatible Content-Language: en-US To: Krzysztof Kozlowski , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241214220419.723100-1-ivo.ivanov.ivanov1@gmail.com> <20241214220419.723100-2-ivo.ivanov.ivanov1@gmail.com> <0ebc12ed-fe91-4c8a-a626-b735b0eeecf1@kernel.org> <007559c5-f566-4625-99b7-e761a916fba3@gmail.com> <6e93d59d-71e5-4c09-862f-55b5504121aa@gmail.com> <69fd1dbc-a29f-488c-a30f-7e5ea8f01a23@kernel.org> <17fbfcdd-8b79-4907-a4c8-798da0ef0526@gmail.com> <56c5788a-2d49-4abb-af4b-65a11bdc4094@kernel.org> <3fb8ba3f-3016-4823-bf48-130f173c8f66@kernel.org> From: Ivaylo Ivanov In-Reply-To: <3fb8ba3f-3016-4823-bf48-130f173c8f66@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241218_013036_261184_97704467 X-CRM114-Status: GOOD ( 15.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 12/18/24 11:22, Krzysztof Kozlowski wrote: > On 17/12/2024 11:04, Ivaylo Ivanov wrote: >> On 12/17/24 11:43, Krzysztof Kozlowski wrote: >>> On 17/12/2024 10:31, Ivaylo Ivanov wrote: >>>> On 12/17/24 11:26, Krzysztof Kozlowski wrote: >>>>> On 17/12/2024 10:08, Ivaylo Ivanov wrote: >>>>>>>>>> - items: >>>>>>>>>> - enum: >>>>>>>>>> @@ -94,9 +95,28 @@ allOf: >>>>>>>>>> - clock-names >>>>>>>>>> >>>>>>>>>> else: >>>>>>>>>> - properties: >>>>>>>>>> - clocks: >>>>>>>>>> - maxItems: 1 >>>>>>>>>> + if: >>>>>>>>>> + properties: >>>>>>>>>> + compatible: >>>>>>>>>> + contains: >>>>>>>>>> + enum: >>>>>>>>>> + - samsung,exynos8895-hsi2c >>>>>>>>>> + >>>>>>>>>> + then: >>>>>>>>>> + properties: >>>>>>>>>> + clocks: >>>>>>>>> Missing minItems >>>>>>>>> >>>>>>>>>> + maxItems: 2 >>>>>>>>>> + >>>>>>>>>> + clock-names: >>>>>>>>> Ditto >>>>>>>>> >>>>>>>>>> + maxItems: 2 >>>>>>>>>> + >>>>>>>>>> + required: >>>>>>>>>> + - clock-names >>>>>>>>> I don't understand why do you need second, same branch in if, basically >>>>>>>> Because, as I stated in the commit message, we have HSI2C controllers >>>>>>>> both implemented in USIv1 blocks and outside. These that are a part of >>>>>>> On Exynos8895? Where? With the same compatible? >>>>>> hsi2c_0 which has a clock from BUSC and hsi2c_1 to hsi2c_4 which use clocks >>>>>> from PERIC1 (CLK_GOUT_PERIC1_HSI2C_CAM{0,1,2,3}_IPCLK). Why would >>>>>> they need a different compatible though? It's functionally the same i2c design >>>>>> as the one implemented in USIv1 blocks. >>>>> If one block is part of USI and other not, they might not be the same >>>>> I2C blocks, even if interface is similar. If they were the same or even >>>>> functionally the same, they would have the same clock inputs. However >>>> I see, so in such case I should make samsung,exynos8895-hsi2c-nonusi or >>>> something like that? >>>> >>>>> user manual also suggests that there is only one clock, not two (for >>>>> both cases), so they could be functionally equivalent but then number of >>>>> clocks looks incorrect. >>>> That'd be weird. Both according to downstream and upstream clk driver, >>>> for the USI-implemented i2cs we have a pclk and an sclk_usi. >>> Something is not precise here, as usually with Samsung clock topology. >>> >>> First, the non-USI instances have the IPCLK as well, e.g. things like >>> PERIC1_UID_HSI2C_CAM1_IPCLKPORT_iPCLK >>> >>> USI have BLK_PERIC0_UID_USI03_IPCLKPORT_i_SCLK_USI, but that's USI >>> clock, not HSI2C in USI. Datasheet mentions this is UART and SPI special >>> clock, but not I2C. >> That's weird. Don't we need the clock enabled in order for the >> USIv1's HSI2C to work? > The clock goes to USI, so it is enabled, no? Yes, and as Markuss said: "USI PCLK is used for the internal AMBA APB bus clock and the IPCLK signal is used for the peripheral controller blocks (i2c/spi/uart)." So perhaps referencing the USI PCLK in the hsi2c driver for USIv2, as well as USIv1, is a wrong approach and should be dropped/fixed? Best regards, Ivo > > Best regards, > Krzysztof