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Tue, 12 Aug 2025 05:38:35 +0000 Message-ID: <80fc509b-be10-4080-8501-8e210587b774@amd.com> Date: Tue, 12 Aug 2025 11:08:29 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [v3 1/2] drm/amd/pm: Add VCN reset support detection for SMU v13.0.6 To: "Jesse.Zhang" , amd-gfx@lists.freedesktop.org Cc: Alexander.Deucher@amd.com, Christian Koenig , Ruili Ji References: <20250812010345.2261810-1-Jesse.Zhang@amd.com> Content-Language: en-US From: "Lazar, Lijo" In-Reply-To: <20250812010345.2261810-1-Jesse.Zhang@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-ClientProxiedBy: PN4P287CA0106.INDP287.PROD.OUTLOOK.COM (2603:1096:c01:276::6) To DS0PR12MB7804.namprd12.prod.outlook.com (2603:10b6:8:142::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR12MB7804:EE_|PH7PR12MB8121:EE_ X-MS-Office365-Filtering-Correlation-Id: 64d01f29-8476-4238-a954-08ddd9627b08 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024; 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Key changes include: > > 1. Added amdgpu_dpm_reset_vcn_is_supported() interface to check VCN reset support > 2. Implemented SMU backend functions for VCN reset capability detection > 3. Added SMU_CAP(VCN_RESET) capability flag for SMU v13.0.6 > 4. Updated PPSMC message definitions to accommodate VCN reset functionality > 5. Added version checks for VCN reset support (fw_ver >= 0x04557100) > > The changes maintain backward compatibility while enabling proper detection > of VCN reset capabilities when supported by the firmware. > > v2: clean up debug info and adjust this message to be more meaningful (Alex) > > Suggested-by: Alex Deucher > Signed-off-by: Ruili Ji > Signed-off-by: Jesse Zhang > --- > drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 15 +++++++++++++++ > drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 1 + > drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 ++++++++++ > drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 5 +++++ > .../pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h | 4 ++-- > .../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 17 +++++++++++++++++ > .../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h | 1 + > 7 files changed, 51 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c > index 6e0d711820ea..518d07afc7df 100644 > --- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c > +++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c > @@ -820,6 +820,21 @@ int amdgpu_dpm_reset_vcn(struct amdgpu_device *adev, uint32_t inst_mask) > return ret; > } > > +bool amdgpu_dpm_reset_vcn_is_supported(struct amdgpu_device *adev) > +{ > + struct smu_context *smu = adev->powerplay.pp_handle; > + bool ret; > + > + if (!is_support_sw_smu(adev)) > + return false; > + > + mutex_lock(&adev->pm.mutex); > + ret = smu_reset_vcn_is_supported(smu); > + mutex_unlock(&adev->pm.mutex); > + > + return ret; > +} > + > int amdgpu_dpm_get_dpm_freq_range(struct amdgpu_device *adev, > enum pp_clock_type type, > uint32_t *min, > diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h > index 09962db988d6..9748744133d9 100644 > --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h > +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h > @@ -615,6 +615,7 @@ ssize_t amdgpu_dpm_get_pm_policy_info(struct amdgpu_device *adev, > int amdgpu_dpm_reset_sdma(struct amdgpu_device *adev, uint32_t inst_mask); > bool amdgpu_dpm_reset_sdma_is_supported(struct amdgpu_device *adev); > int amdgpu_dpm_reset_vcn(struct amdgpu_device *adev, uint32_t inst_mask); > +bool amdgpu_dpm_reset_vcn_is_supported(struct amdgpu_device *adev); > bool amdgpu_dpm_is_temp_metrics_supported(struct amdgpu_device *adev, > enum smu_temp_metric_type type); > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > index dc48a1dd8be4..f9a350a82764 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > @@ -4106,6 +4106,16 @@ int smu_reset_sdma(struct smu_context *smu, uint32_t inst_mask) > return ret; > } > > +bool smu_reset_vcn_is_supported(struct smu_context *smu) > +{ > + bool ret = false; > + > + if (smu->ppt_funcs && smu->ppt_funcs->reset_vcn_is_supported) > + ret = smu->ppt_funcs->reset_vcn_is_supported(smu); > + > + return ret; > +} > + > int smu_reset_vcn(struct smu_context *smu, uint32_t inst_mask) > { > if (smu->ppt_funcs && smu->ppt_funcs->dpm_reset_vcn) > diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h > index 611b381b9147..7990771151be 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h > +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h > @@ -1426,6 +1426,10 @@ struct pptable_funcs { > * @reset_vcn: message SMU to soft reset vcn instance. > */ > int (*dpm_reset_vcn)(struct smu_context *smu, uint32_t inst_mask); > + /** > + * @reset_vcn_is_supported: Check if support resets vcn. > + */ > + bool (*reset_vcn_is_supported)(struct smu_context *smu); > > /** > * @get_ecc_table: message SMU to get ECC INFO table. > @@ -1702,6 +1706,7 @@ int smu_send_rma_reason(struct smu_context *smu); > int smu_reset_sdma(struct smu_context *smu, uint32_t inst_mask); > bool smu_reset_sdma_is_supported(struct smu_context *smu); > int smu_reset_vcn(struct smu_context *smu, uint32_t inst_mask); > +bool smu_reset_vcn_is_supported(struct smu_context *smu); > int smu_set_pm_policy(struct smu_context *smu, enum pp_pm_policy p_type, > int level); > ssize_t smu_get_pm_policy_info(struct smu_context *smu, It's better to split smu v13.0.6 changes to a separate patch. > diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h > index 41f268313613..63a088ef7169 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h > +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h > @@ -94,9 +94,9 @@ > #define PPSMC_MSG_RmaDueToBadPageThreshold 0x43 > #define PPSMC_MSG_SetThrottlingPolicy 0x44 > #define PPSMC_MSG_ResetSDMA 0x4D > -#define PPSMC_MSG_ResetVCN 0x4E > #define PPSMC_MSG_GetStaticMetricsTable 0x59 > -#define PPSMC_Message_Count 0x5A > +#define PPSMC_MSG_ResetVCN 0x5B > +#define PPSMC_Message_Count 0x5C > > //PPSMC Reset Types for driver msg argument > #define PPSMC_RESET_TYPE_DRIVER_MODE_1_RESET 0x1 > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c > index 90e66c8f2f82..60aaf0e2ce8f 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c > @@ -434,6 +434,9 @@ static void smu_v13_0_6_init_caps(struct smu_context *smu) > ((pgm == 0) && (fw_ver >= 0x00557900)) || > ((pgm == 4) && (fw_ver >= 0x4557000))) > smu_v13_0_6_cap_set(smu, SMU_CAP(SDMA_RESET)); > + > + if ((pgm == 4) && (fw_ver >= 0x04557100)) > + smu_v13_0_6_cap_set(smu, SMU_CAP(VCN_RESET)); > } > > static void smu_v13_0_x_init_caps(struct smu_context *smu) > @@ -3171,6 +3174,19 @@ static int smu_v13_0_6_reset_sdma(struct smu_context *smu, uint32_t inst_mask) > return ret; > } > > +static bool smu_v13_0_6_reset_vcn_is_supported(struct smu_context *smu) > +{ > + bool ret = true; > + > + if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(VCN_RESET))) { > + dev_info(smu->adev->dev, > + "SMU VCN reset not supported. Please update SMU firmware.\n"); This will come for every reset attempt for programs other than 4. Better restrict this to once, or not to keep it as it requires IFWI update. Thanks, Lijo > + ret = false; > + } > + > + return ret; > +} > + > static int smu_v13_0_6_reset_vcn(struct smu_context *smu, uint32_t inst_mask) > { > int ret = 0; > @@ -3859,6 +3875,7 @@ static const struct pptable_funcs smu_v13_0_6_ppt_funcs = { > .reset_sdma = smu_v13_0_6_reset_sdma, > .reset_sdma_is_supported = smu_v13_0_6_reset_sdma_is_supported, > .dpm_reset_vcn = smu_v13_0_6_reset_vcn, > + .reset_vcn_is_supported = smu_v13_0_6_reset_vcn_is_supported, > }; > > void smu_v13_0_6_set_ppt_funcs(struct smu_context *smu) > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h > index ece04ad724fb..7c98f77c429d 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h > @@ -64,6 +64,7 @@ enum smu_v13_0_6_caps { > SMU_CAP(RMA_MSG), > SMU_CAP(ACA_SYND), > SMU_CAP(SDMA_RESET), > + SMU_CAP(VCN_RESET), > SMU_CAP(STATIC_METRICS), > SMU_CAP(HST_LIMIT_METRICS), > SMU_CAP(BOARD_VOLTAGE),