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Fri, 1 Dec 2023 09:34:10 +0800 From: JeeHeng Sia To: Leyfoon Tan , "kernel@esmil.dk" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "krzk@kernel.org" , "conor+dt@kernel.org" , "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "aou@eecs.berkeley.edu" , "daniel.lezcano@linaro.org" , "tglx@linutronix.de" , "conor@kernel.org" , "anup@brainfault.org" , "gregkh@linuxfoundation.org" , "jirislaby@kernel.org" , "michal.simek@amd.com" , Michael Zhu , "drew@beagleboard.org" CC: "devicetree@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree Thread-Topic: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree Thread-Index: AQHaIomdkCH/WE7GIU6i0VyZ0qWNd7CSonGAgAEFIaA= Date: Fri, 1 Dec 2023 01:34:10 +0000 Message-ID: <823f1c9a43aa4ded919b05f5a96f036b@EXMBX066.cuchost.com> References: <20231129060043.368874-1-jeeheng.sia@starfivetech.com> <20231129060043.368874-7-jeeheng.sia@starfivetech.com> <21e2d194efee4bb6b870735e6fe2d65c@EXMBX061.cuchost.com> In-Reply-To: <21e2d194efee4bb6b870735e6fe2d65c@EXMBX061.cuchost.com> Accept-Language: en-US, zh-CN Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [60.54.3.230] x-yovoleruleagent: yovoleflag MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231130_173443_738575_959BBE8C X-CRM114-Status: GOOD ( 12.23 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org > -----Original Message----- > From: Leyfoon Tan > Sent: Friday, December 1, 2023 1:58 AM > To: JeeHeng Sia ; kernel@esmil.dk; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > krzk@kernel.org; conor+dt@kernel.org; paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu; > daniel.lezcano@linaro.org; tglx@linutronix.de; conor@kernel.org; anup@brainfault.org; gregkh@linuxfoundation.org; > jirislaby@kernel.org; michal.simek@amd.com; Michael Zhu ; drew@beagleboard.org > Cc: devicetree@vger.kernel.org; linux-riscv@lists.infradead.org; linux-kernel@vger.kernel.org > Subject: RE: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree > > > > -----Original Message----- > From: JeeHeng Sia > Sent: Wednesday, November 29, 2023 2:01 PM > To: kernel@esmil.dk; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; krzk@kernel.org; conor+dt@kernel.org; > paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu; daniel.lezcano@linaro.org; tglx@linutronix.de; > conor@kernel.org; anup@brainfault.org; gregkh@linuxfoundation.org; jirislaby@kernel.org; michal.simek@amd.com; Michael Zhu > ; drew@beagleboard.org > Cc: devicetree@vger.kernel.org; linux-riscv@lists.infradead.org; linux-kernel@vger.kernel.org; JeeHeng Sia > ; Leyfoon Tan > Subject: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree > > Add initial device tree for the StarFive JH8100 RISC-V SoC. > > Signed-off-by: Sia Jee Heng > Reviewed-by: Ley Foon Tan > --- > arch/riscv/boot/dts/starfive/Makefile | 1 + > arch/riscv/boot/dts/starfive/jh8100-evb.dts | 28 ++ > arch/riscv/boot/dts/starfive/jh8100.dtsi | 378 ++++++++++++++++++++ > 3 files changed, 407 insertions(+) > create mode 100644 arch/riscv/boot/dts/starfive/jh8100-evb.dts > create mode 100644 arch/riscv/boot/dts/starfive/jh8100.dtsi > > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile > index 0141504c0f5c..fbb0dc619102 100644 > --- a/arch/riscv/boot/dts/starfive/Makefile > +++ b/arch/riscv/boot/dts/starfive/Makefile > @@ -10,3 +10,4 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb > > dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb > dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb > +dtb-$(CONFIG_ARCH_STARFIVE) += jh8100-evb.dtb > Add empty line before this. Ok, I can add an empty line here to distinguish between the platforms. > > [....] > > Regards > Ley Foon _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 74787D50; Thu, 30 Nov 2023 17:34:24 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 80FA180A4; Fri, 1 Dec 2023 09:34:10 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 1 Dec 2023 09:34:10 +0800 Received: from EXMBX066.cuchost.com (172.16.7.66) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 1 Dec 2023 09:34:09 +0800 Received: from EXMBX066.cuchost.com ([fe80::5947:9245:907e:339f]) by EXMBX066.cuchost.com ([fe80::5947:9245:907e:339f%17]) with mapi id 15.00.1497.044; Fri, 1 Dec 2023 09:34:10 +0800 From: JeeHeng Sia To: Leyfoon Tan , "kernel@esmil.dk" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "krzk@kernel.org" , "conor+dt@kernel.org" , "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "aou@eecs.berkeley.edu" , "daniel.lezcano@linaro.org" , "tglx@linutronix.de" , "conor@kernel.org" , "anup@brainfault.org" , "gregkh@linuxfoundation.org" , "jirislaby@kernel.org" , "michal.simek@amd.com" , Michael Zhu , "drew@beagleboard.org" CC: "devicetree@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree Thread-Topic: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree Thread-Index: AQHaIomdkCH/WE7GIU6i0VyZ0qWNd7CSonGAgAEFIaA= Date: Fri, 1 Dec 2023 01:34:10 +0000 Message-ID: <823f1c9a43aa4ded919b05f5a96f036b@EXMBX066.cuchost.com> References: <20231129060043.368874-1-jeeheng.sia@starfivetech.com> <20231129060043.368874-7-jeeheng.sia@starfivetech.com> <21e2d194efee4bb6b870735e6fe2d65c@EXMBX061.cuchost.com> In-Reply-To: <21e2d194efee4bb6b870735e6fe2d65c@EXMBX061.cuchost.com> Accept-Language: en-US, zh-CN Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-yovoleruleagent: yovoleflag Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 > -----Original Message----- > From: Leyfoon Tan > Sent: Friday, December 1, 2023 1:58 AM > To: JeeHeng Sia ; kernel@esmil.dk; robh+dt@= kernel.org; krzysztof.kozlowski+dt@linaro.org; > krzk@kernel.org; conor+dt@kernel.org; paul.walmsley@sifive.com; palmer@da= bbelt.com; aou@eecs.berkeley.edu; > daniel.lezcano@linaro.org; tglx@linutronix.de; conor@kernel.org; anup@bra= infault.org; gregkh@linuxfoundation.org; > jirislaby@kernel.org; michal.simek@amd.com; Michael Zhu ; drew@beagleboard.org > Cc: devicetree@vger.kernel.org; linux-riscv@lists.infradead.org; linux-ke= rnel@vger.kernel.org > Subject: RE: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH= 8100 device tree >=20 >=20 >=20 > -----Original Message----- > From: JeeHeng Sia > Sent: Wednesday, November 29, 2023 2:01 PM > To: kernel@esmil.dk; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.or= g; krzk@kernel.org; conor+dt@kernel.org; > paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu; dani= el.lezcano@linaro.org; tglx@linutronix.de; > conor@kernel.org; anup@brainfault.org; gregkh@linuxfoundation.org; jirisl= aby@kernel.org; michal.simek@amd.com; Michael Zhu > ; drew@beagleboard.org > Cc: devicetree@vger.kernel.org; linux-riscv@lists.infradead.org; linux-ke= rnel@vger.kernel.org; JeeHeng Sia > ; Leyfoon Tan > Subject: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100= device tree >=20 > Add initial device tree for the StarFive JH8100 RISC-V SoC. >=20 > Signed-off-by: Sia Jee Heng > Reviewed-by: Ley Foon Tan > --- > arch/riscv/boot/dts/starfive/Makefile | 1 + > arch/riscv/boot/dts/starfive/jh8100-evb.dts | 28 ++ > arch/riscv/boot/dts/starfive/jh8100.dtsi | 378 ++++++++++++++++++++ > 3 files changed, 407 insertions(+) > create mode 100644 arch/riscv/boot/dts/starfive/jh8100-evb.dts > create mode 100644 arch/riscv/boot/dts/starfive/jh8100.dtsi >=20 > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/= starfive/Makefile > index 0141504c0f5c..fbb0dc619102 100644 > --- a/arch/riscv/boot/dts/starfive/Makefile > +++ b/arch/riscv/boot/dts/starfive/Makefile > @@ -10,3 +10,4 @@ dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7100-starfive-vision= five-v1.dtb >=20 > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.2a.dtb > dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.3b.dtb > +dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh8100-evb.dtb > Add empty line before this. Ok, I can add an empty line here to distinguish between the platforms. >=20 > [....] >=20 > Regards > Ley Foon