From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: ignore cached memory flag in i965_write_entry()? Date: Tue, 14 Dec 2010 09:26:01 +0000 Message-ID: <849307$aokeen@azsmga001.ch.intel.com> References: <20101214030353.GA27806@zhen-devel.sh.intel.com> <20101214050250.GB27927@zhen-devel.sh.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 326269E763 for ; Tue, 14 Dec 2010 01:26:05 -0800 (PST) In-Reply-To: <20101214050250.GB27927@zhen-devel.sh.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Zhenyu Wang , daniel.vetter@ffwll.ch, intel-gfx List-Id: intel-gfx@lists.freedesktop.org On Tue, 14 Dec 2010 13:02:50 +0800, Zhenyu Wang wrote: > On 2010.12.14 11:03:53 +0800, Zhenyu Wang wrote: > > > > Looks from a6963596a13e62f8e65b1cf3403a330ff2db407c, setting > > GTT entry on i965-ish totally ignored cached memory flag? > > That might break r/w consistent for pages like hw status. > > > > This should recover that. Nice catch. My fault, I should have spotted that when I applied the patch. Thanks! -Chris -- Chris Wilson, Intel Open Source Technology Centre