From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 2/4] drm/i915: add plane enable/disable functions Date: Thu, 30 Dec 2010 21:34:46 +0000 Message-ID: <849307$av583d@azsmga001.ch.intel.com> References: <1293743792-8665-1-git-send-email-jbarnes@virtuousgeek.org> <1293743792-8665-3-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 6B4B99E746 for ; Thu, 30 Dec 2010 13:35:09 -0800 (PST) In-Reply-To: <1293743792-8665-3-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Trivial comment, on passing... On Thu, 30 Dec 2010 13:16:30 -0800, Jesse Barnes wrote: > Add plane enable/disable functions to prevent duplicated code and allow > us to easily check for plane enable/disable requirements (such as pipe > enable). > +static void intel_disable_plane(struct drm_i915_private *dev_priv, > + enum plane plane, enum pipe pipe) > +{ > + int reg; > + u32 val; > + > + reg = DSPCNTR(plane); > + val = I915_READ(reg); > + val &= ~DISPLAY_PLANE_ENABLE; > + I915_WRITE(reg, val); > + POSTING_READ(reg); > + reg = DSPADDR(plane); > + I915_WRITE(reg, I915_READ(reg)); /* trigger an update */ Use intel_flush_display_plane(dev_priv, plane); though maybe that function becomes redundant? Unlikely... -Chris -- Chris Wilson, Intel Open Source Technology Centre