From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [PATCH 4/4] drm/i915: add PLL enable/disable
	functions
Date: Thu, 30 Dec 2010 21:41:18 +0000
Message-ID: <849307$av59ci@azsmga001.ch.intel.com>
References: <1293743792-8665-1-git-send-email-jbarnes@virtuousgeek.org>
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To: Jesse Barnes <jbarnes@virtuousgeek.org>, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

On Thu, 30 Dec 2010 13:16:32 -0800, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>  /**
> + * intel_enable_pll - enable a PLL
> + * @dev_priv: i915 private structure
> + * @pipe: pipe PLL to enable
> + *
> + * Enable @pipe's PLL so we can start pumping pixels from a plane.  Check to
> + * make sure the PLL reg is writable first though, since the panel write
> + * protect mechanism may be enabled.
> + *
> + * Note!  This is for pre-ILK only.
> + */
> +static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
> +{
> +	int reg;
> +	u32 val;

Reinforce the comments with a BUG_ON(dev_priv->info->gen >= 5);
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre