From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 04/16] drm/i915: add Ivy Bridge PCI IDs and flags Date: Wed, 27 Apr 2011 07:59:17 +0100 Message-ID: <849307$cme8bu@azsmga001.ch.intel.com> References: <1303861134-8762-1-git-send-email-jbarnes@virtuousgeek.org> <1303861134-8762-5-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id A0EEC9EFED for ; Tue, 26 Apr 2011 23:59:20 -0700 (PDT) In-Reply-To: <1303861134-8762-5-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, 26 Apr 2011 16:38:42 -0700, Jesse Barnes wrote: > Check for IVB desktop, mobile and other SKUs and set flags > appropriately. > > Signed-off-by: Jesse Barnes > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 2a41118..0b5e263 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -230,6 +230,7 @@ struct intel_device_info { > u8 is_pineview : 1; > u8 is_broadwater : 1; > u8 is_crestline : 1; > + u8 is_ivybridge : 1; Since ivybridge is synonymous with GEN7, we have been going with the latter. I want to reserve the capability bits for instances where we either have a workaround for a few chipsets (and so I have a patch to strip out the is_broadwater and is_crestline since they are just a single pci-id each) or otherwise describing a feature across chipsets. So I think we just want IS_GEN7() for IVB code. -Chris -- Chris Wilson, Intel Open Source Technology Centre