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From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Deak, Imre" <imre.deak@intel.com>
Subject: Re: [Intel-gfx] [PATCH RESEND v3 1/3] drm/i915/dp_mst: Fix disabling MST on a port
Date: Sun, 7 Jun 2020 22:11:44 +0000	[thread overview]
Message-ID: <854f3594de3a7531eb4e4fa1cf4449bcd7b02dea.camel@intel.com> (raw)
In-Reply-To: <20200605094801.17709-1-imre.deak@intel.com>

On Fri, 2020-06-05 at 12:48 +0300, Imre Deak wrote:
> Currently MST on a port can get enabled/disabled from the hotplug work
> and get disabled from the short pulse work in a racy way. Fix this by
> relying on the MST state checking in the hotplug work and just schedule
> a hotplug work from the short pulse handler if some problem happened
> during the MST interrupt handling.
> 
> This removes the explicit MST disabling in case of an AUX failure, but
> if AUX fails, then probably the detection will also fail during the
> scheduled hotplug work and it's not guaranteed that we'll see
> intermittent errors anyway.
> 
> While at it also simplify the error checking of the MST interrupt
> handler.
> 
> v2:
> - Convert intel_dp_check_mst_status() to return bool. (Ville)
> - Change the intel_dp->is_mst check to an assert, since after this patch
>   the condition can't change after we checked it previously.
> - Document the return value from intel_dp_check_mst_status().
> v3:
> - Remove the intel_dp->is_mst check from intel_dp_check_mst_status().
>   There is no point in checking the same condition twice, even though
>   there is a chance that the hotplug work running concurrently changes
>   it.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> (v1)
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 66 ++++++++++---------------
>  1 file changed, 26 insertions(+), 40 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 55fda074c0ad..42589cae766d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5556,35 +5556,46 @@ static void intel_dp_handle_test_request(struct intel_dp *intel_dp)
>  			    "Could not write test response to sink\n");
>  }
>  
> -static int
> +/**
> + * intel_dp_check_mst_status - service any pending MST interrupts, check link status
> + * @intel_dp: Intel DP struct
> + *
> + * Read any pending MST interrupts, call MST core to handle these and ack the
> + * interrupts. Check if the main and AUX link state is ok.
> + *
> + * Returns:
> + * - %true if pending interrupts were serviced (or no interrupts were
> + *   pending) w/o detecting an error condition.
> + * - %false if an error condition - like AUX failure or a loss of link - is
> + *   detected, which needs servicing from the hotplug work.
> + */
> +static bool
>  intel_dp_check_mst_status(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> -	bool need_retrain = false;
> -
> -	if (!intel_dp->is_mst)
> -		return -EINVAL;
> +	bool link_ok = true;
>  
>  	drm_WARN_ON_ONCE(&i915->drm, intel_dp->active_mst_links < 0);
>  
>  	for (;;) {
>  		u8 esi[DP_DPRX_ESI_LEN] = {};
> -		bool bret, handled;
> +		bool handled;
>  		int retry;
>  
> -		bret = intel_dp_get_sink_irq_esi(intel_dp, esi);
> -		if (!bret) {
> +		if (!intel_dp_get_sink_irq_esi(intel_dp, esi)) {
>  			drm_dbg_kms(&i915->drm,
>  				    "failed to get ESI - device may have failed\n");
> -			return -EINVAL;
> +			link_ok = false;
> +
> +			break;
>  		}
>  
>  		/* check link status - esi[10] = 0x200c */
> -		if (intel_dp->active_mst_links > 0 && !need_retrain &&
> +		if (intel_dp->active_mst_links > 0 && link_ok &&
>  		    !drm_dp_channel_eq_ok(&esi[10], intel_dp->lane_count)) {
>  			drm_dbg_kms(&i915->drm,
>  				    "channel EQ not ok, retraining\n");
> -			need_retrain = true;
> +			link_ok = false;
>  		}
>  
>  		drm_dbg_kms(&i915->drm, "got esi %3ph\n", esi);
> @@ -5604,7 +5615,7 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
>  		}
>  	}
>  
> -	return need_retrain;
> +	return link_ok;
>  }
>  
>  static bool
> @@ -7255,35 +7266,10 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
>  	}
>  
>  	if (intel_dp->is_mst) {
> -		switch (intel_dp_check_mst_status(intel_dp)) {
> -		case -EINVAL:
> -			/*
> -			 * If we were in MST mode, and device is not
> -			 * there, get out of MST mode
> -			 */
> -			drm_dbg_kms(&i915->drm,
> -				    "MST device may have disappeared %d vs %d\n",
> -				    intel_dp->is_mst,
> -				    intel_dp->mst_mgr.mst_state);
> -			intel_dp->is_mst = false;
> -			drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
> -							intel_dp->is_mst);
> -
> -			return IRQ_NONE;
> -		case 1:
> -			return IRQ_NONE;
> -		default:
> -			break;
> -		}
> -	}
> -
> -	if (!intel_dp->is_mst) {
> -		bool handled;
> -
> -		handled = intel_dp_short_pulse(intel_dp);
> -
> -		if (!handled)
> +		if (!intel_dp_check_mst_status(intel_dp))
>  			return IRQ_NONE;
> +	} else if (!intel_dp_short_pulse(intel_dp)) {
> +		return IRQ_NONE;
>  	}
>  

Now it don't need the braces but this is minor.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

>  	return IRQ_HANDLED;
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  reply	other threads:[~2020-06-07 22:11 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-03 21:10 [PATCH 1/3] drm/i915/dp_mst: Fix disabling MST on a port Imre Deak
2020-06-03 21:10 ` [Intel-gfx] " Imre Deak
2020-06-03 21:10 ` [PATCH 2/3] drm/dp_mst: Sanitize mgr->qlock locking in drm_dp_mst_wait_tx_reply() Imre Deak
2020-06-03 21:10   ` [Intel-gfx] " Imre Deak
2020-06-03 21:27   ` Souza, Jose
2020-06-03 21:27     ` Souza, Jose
2020-06-03 21:10 ` [PATCH 3/3] drm/i915/dp_mst: Work around out-of-spec adapters filtering short pulses Imre Deak
2020-06-03 21:10   ` [Intel-gfx] " Imre Deak
2020-06-03 22:18   ` [PATCH v2 " Imre Deak
2020-06-03 22:18     ` [Intel-gfx] " Imre Deak
2020-06-04 15:12     ` Ville Syrjälä
2020-06-04 15:12       ` Ville Syrjälä
2020-06-04 15:41       ` Imre Deak
2020-06-04 15:41         ` Imre Deak
2020-06-04 18:45   ` [PATCH v3 " Imre Deak
2020-06-04 18:45     ` [Intel-gfx] " Imre Deak
2020-06-04 18:54     ` Ville Syrjälä
2020-06-04 18:54       ` [Intel-gfx] " Ville Syrjälä
2020-06-09 12:15     ` Imre Deak
2020-06-09 12:15       ` Imre Deak
2020-06-09 15:58       ` Lyude Paul
2020-06-09 15:58         ` Lyude Paul
2020-06-09 18:03         ` Imre Deak
2020-06-09 18:03           ` Imre Deak
2020-06-03 21:27 ` [Intel-gfx] [PATCH 1/3] drm/i915/dp_mst: Fix disabling MST on a port Souza, Jose
2020-06-03 21:27   ` Souza, Jose
2020-06-03 21:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] " Patchwork
2020-06-03 21:56 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-03 22:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/dp_mst: Fix disabling MST on a port (rev2) Patchwork
2020-06-03 23:18 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-04  8:26 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/dp_mst: Fix disabling MST on a port Patchwork
2020-06-04  8:47 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/dp_mst: Fix disabling MST on a port (rev2) Patchwork
2020-06-04 14:55 ` [Intel-gfx] [PATCH 1/3] drm/i915/dp_mst: Fix disabling MST on a port Ville Syrjälä
2020-06-04 14:55   ` Ville Syrjälä
2020-06-04 15:09   ` Imre Deak
2020-06-04 15:09     ` Imre Deak
2020-06-04 18:44 ` [PATCH v2 " Imre Deak
2020-06-04 18:44   ` [Intel-gfx] " Imre Deak
2020-06-05  9:16   ` [Intel-gfx] [PATCH v3 " Imre Deak
2020-06-05  9:48   ` [Intel-gfx] [PATCH RESEND " Imre Deak
2020-06-07 22:11     ` Souza, Jose [this message]
2020-06-07 23:15       ` Imre Deak
2020-06-04 19:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915/dp_mst: Fix disabling MST on a port (rev4) Patchwork
2020-06-04 23:55 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-06-05  9:27 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [v3,1/3] drm/i915/dp_mst: Fix disabling MST on a port (rev5) Patchwork
2020-06-05 10:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [RESEND,v3,1/3] drm/i915/dp_mst: Fix disabling MST on a port (rev6) Patchwork
2020-06-05 11:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-06-05 11:50   ` Imre Deak
2020-06-05 15:03     ` Vudum, Lakshminarayana
2020-06-05 13:53 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-06-11 12:47   ` Imre Deak
2020-06-11 12:47     ` [Intel-gfx] " Imre Deak

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