From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E301BC02185 for ; Fri, 17 Jan 2025 17:26:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 990E410E336; Fri, 17 Jan 2025 17:26:00 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="BYu94zt1"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id D3EF210E336 for ; Fri, 17 Jan 2025 17:25:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737134760; x=1768670760; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=tHIOpzHg2ylwfPSIYcCOhceIWpduOsl4zK9lkcH0/lc=; b=BYu94zt1C9O8rVvjzA+fQAfXN1lz4E/YvbCxiN6iW6hjjSkLMDZXvUtf f/dGt1Qpbd5DK+ILFDOkUXc4ALuSJwLQTuVWl3kJq7it5A6OZoVcyQusZ cBF7389PV7AeUGD+IeuqNeOfcC/u8T0enpLOXPW8eqRi9Isx26sMuQI32 ppeam3A47e/2BvUUwsEVoTqj4+H8isoOVZSjOgTyPvcT7h1qujAnpdneQ snNoyvv8x3e4R2SY52/6K6gqf4e0dhLWZQBeZw46EqsuWpUgsZ0SNmUnm 5Soe0LZ4SVdcRVz0l8f5voCGD4DqQ4O1Cz4bVac4kin/kIj9DLaxlSSYy A==; X-CSE-ConnectionGUID: x+dV6/ngTZy2yYjBRfi6TQ== X-CSE-MsgGUID: Y+N0Y1e3RYuz5w6iZGxJGg== X-IronPort-AV: E=McAfee;i="6700,10204,11318"; a="40381451" X-IronPort-AV: E=Sophos;i="6.13,212,1732608000"; d="scan'208";a="40381451" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jan 2025 09:25:59 -0800 X-CSE-ConnectionGUID: 2GJelc3FQM+L+TbKugJOEA== X-CSE-MsgGUID: 6cIXw/KhSqCxFIKtP22hIg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="110970038" Received: from orsosgc001.jf.intel.com (HELO orsosgc001.intel.com) ([10.165.21.142]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jan 2025 09:26:00 -0800 Date: Fri, 17 Jan 2025 09:25:59 -0800 Message-ID: <85ldv9e4ig.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Harish Chegondi Cc: , , , , , , , , Subject: Re: [PATCH v8 1/7] drm/xe/topology: Add a function to find the index of the last enabled DSS in a mask In-Reply-To: <51aa2badd6fe077dd58184552d6966b94bb4ae4e.1736970203.git.harish.chegondi@intel.com> References: <51aa2badd6fe077dd58184552d6966b94bb4ae4e.1736970203.git.harish.chegondi@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-redhat-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Wed, 15 Jan 2025 12:02:07 -0800, Harish Chegondi wrote: > > Last enabled DSS in a DSS mask can help estimate the maximum DSSes enabled > in the DSS mask, as the enabled DSSes can be discontiguous. > > Signed-off-by: Harish Chegondi > --- > drivers/gpu/drm/xe/xe_gt_topology.h | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/xe/xe_gt_topology.h b/drivers/gpu/drm/xe/xe_gt_topology.h > index 746b325bbf6e..a72d26ba0653 100644 > --- a/drivers/gpu/drm/xe/xe_gt_topology.h > +++ b/drivers/gpu/drm/xe/xe_gt_topology.h > @@ -25,6 +25,19 @@ void xe_gt_topology_init(struct xe_gt *gt); > > void xe_gt_topology_dump(struct xe_gt *gt, struct drm_printer *p); > > +/** > + * xe_gt_topology_mask_last_dss() - Returns the index of the last DSS in a mask. > + * @mask: Input DSS mask > + * > + * Return: Index of the last DSS in the input DSS mask, > + * XE_MAX_DSS_FUSE_BITS if DSS mask is empty. > + */ > +static inline unsigned int u32? > +xe_gt_topology_mask_last_dss(const xe_dss_mask_t mask) > +{ > + return find_last_bit(mask, XE_MAX_DSS_FUSE_BITS); > +} > + The convention here seems to be to keep function definitions in .c and declarations in .h? > unsigned int > xe_dss_mask_group_ffs(const xe_dss_mask_t mask, int groupsize, int groupnum); > > -- > 2.47.1 >