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From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Jesse.Zhang <Jesse.Zhang@amd.com>
Cc: <igt-dev@lists.freedesktop.org>,
	Vitaly Prosyak <vitaly.prosyak@amd.com>,
	Alex Deucher <alexander.deucher@amd.com>,
	Christian Koenig <christian.koenig@amd.com>
Subject: Re: [PATCH i-g-t 3/4] tests/amdgpu: Add test coverage for all user-mode queues across IP blocks
Date: Wed, 09 Jul 2025 22:58:20 -0700	[thread overview]
Message-ID: <85tt3kk2o3.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20250708074819.624367-3-Jesse.Zhang@amd.com>

On Tue, 08 Jul 2025 00:47:49 -0700, Jesse.Zhang wrote:
>
> Introduced a new test function, amdgpu_test_all_queues(), to validate
> write-linear command submission across all available IP blocks (GFX, Compute, SDMA)
> with user-mode queues (UMQ).
>
> - Adds a dynamic subtest "all-queues-test-with-UMQ" under amdgpu_basic to ensure
>   all supported IP queues are exercised individually and in combination.
> - Uses the newly added helper amdgpu_command_submission_write_linear_helper2() to
>   manage setup, execution, and teardown across multiple IP types.
>
> This improves test coverage for command submission paths involving user queues
> and multi-IP coordination.
>
> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
> ---
>  tests/amdgpu/amd_basic.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/tests/amdgpu/amd_basic.c b/tests/amdgpu/amd_basic.c
> index 8c6b466ce..100a634ce 100644
> --- a/tests/amdgpu/amd_basic.c
> +++ b/tests/amdgpu/amd_basic.c
> @@ -139,6 +139,14 @@ static void amdgpu_command_submission_sdma(amdgpu_device_handle device, bool use
>	amdgpu_command_submission_nop(device, AMDGPU_HW_IP_DMA, user_queue);
>  }
>
> +static void amdgpu_test_all_queues(amdgpu_device_handle device, bool user_queue)
> +{
> +	amdgpu_command_submission_write_linear_helper2(device, AMDGPU_HW_IP_GFX, false, user_queue);
> +	amdgpu_command_submission_write_linear_helper2(device, AMDGPU_HW_IP_COMPUTE, false, user_queue);
> +	amdgpu_command_submission_write_linear_helper2(device, AMDGPU_HW_IP_DMA, false, user_queue);
> +	amdgpu_command_submission_write_linear_helper2(device, AMDGPU_HW_IP_GFX |AMDGPU_HW_IP_COMPUTE |
> +							AMDGPU_HW_IP_DMA, false, user_queue);
> +}

>  /**
>   * SEMAPHORE
>   * @param device
> @@ -830,6 +838,16 @@ igt_main
>			amdgpu_command_submission_sdma(device, true);
>		}
>	}
> +
> +	igt_describe("Check-all-user-queues-for-write-operation");
> +	igt_subtest_with_dynamic("all-queues-test-with-UMQ") {
> +		if (enable_test && userq_arr_cap[AMD_IP_GFX] &&
> +				userq_arr_cap[AMD_IP_COMPUTE] &&
> +				userq_arr_cap[AMD_IP_DMA]) {
> +			igt_dynamic_f("all-queues-with-umq")
> +			amdgpu_test_all_queues(device, true);


Please clean up this warning without AMDGPU_USERQ_ENABLED:

636/1531] Compiling C object tests/amdgpu/amd_basic.p/amd_basic.c.o
../tests/amdgpu/amd_basic.c:142:13: warning: ‘amdgpu_test_all_queues’ defined but not used [-Wunused-function]
  142 | static void amdgpu_test_all_queues(amdgpu_device_handle device, bool user_queue)
      |             ^~~~~~~~~~~~~~~~~~~~~~
[1526/1529] Generating docs/testplan/intel-ci-tests with a custom command


> +		}
> +	}
>  #endif
>
>	igt_fixture {
> --
> 2.49.0
>

  reply	other threads:[~2025-07-10  5:58 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-08  7:47 [PATCH i-g-t 1/4] drm-uapi/amdgpu: Add num_userq_slots to hw_ip_info structure Jesse.Zhang
2025-07-08  7:47 ` [PATCH i-g-t 2/4] lib/amdgpu: add multi-IP block write command submission helper Jesse.Zhang
2025-07-08  7:47 ` [PATCH i-g-t 3/4] tests/amdgpu: Add test coverage for all user-mode queues across IP blocks Jesse.Zhang
2025-07-10  5:58   ` Dixit, Ashutosh [this message]
2025-07-10 11:23     ` vitaly prosyak
2025-07-10 16:17       ` Kamil Konieczny
2025-07-10 19:17         ` vitaly prosyak
2025-07-08  7:47 ` [PATCH i-g-t 4/4] lib/amdgpu: Use available_rings mask for user queues Jesse.Zhang
2025-07-08 23:18   ` vitaly prosyak
2025-07-08  8:31 ` ✓ i915.CI.BAT: success for series starting with [i-g-t,1/4] drm-uapi/amdgpu: Add num_userq_slots to hw_ip_info structure Patchwork
2025-07-08  8:40 ` ✓ Xe.CI.BAT: " Patchwork
2025-07-08  9:47 ` ✓ Xe.CI.Full: " Patchwork
2025-07-08  9:57 ` ✗ i915.CI.Full: failure " Patchwork

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