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From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH] drm/xe: Label RING_CONTEXT_CONTROL as masked
Date: Thu, 04 Apr 2024 09:18:24 -0700	[thread overview]
Message-ID: <85ttkhumnj.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <ditc3suqirizkvzij6xecwhcjohwqx4eyagpddv6djtconhjk7@rxj3heqbpeft>

On Thu, 04 Apr 2024 05:46:17 -0700, Lucas De Marchi wrote:
>
> On Wed, Apr 03, 2024 at 02:02:07PM -0700, Ashutosh Dixit wrote:
> > RING_CONTEXT_CONTROL is a masked register.
> >
> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>
> Due to the way we end up using it, it's not a problem right now:
>
> drivers/gpu/drm/xe/xe_lrc.c-static void set_context_control(u32 *regs, struct xe_hw_engine *hwe)
> drivers/gpu/drm/xe/xe_lrc.c-{
> drivers/gpu/drm/xe/xe_lrc.c-    regs[CTX_CONTEXT_CONTROL] = _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH) |
> drivers/gpu/drm/xe/xe_lrc.c:                                _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT) |
> drivers/gpu/drm/xe/xe_lrc.c:                                CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT;
>
> it doesn't really use the  masked flag from the register.
> For consistency, and if we ever change the approach, it does look good.
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
> That _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT) |
> CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT looks odd. Commit
> b4b9457ae9b619c106ee464c3d75ee52c0b69575 (from xe brach, not drm-xe)
> blames me while refactoring set_context_control() that always received
> true as argument (heheh... commit message from those early days were a
> piece of art). Could you prep a patch on top changing that to
> ENABLE()?

The code actually "works". I have just added the clean-up to v2, changing this to:

	regs[CTX_CONTEXT_CONTROL] = _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
						       CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);

Thanks.
--
Ashutosh


>
> > ---
> > drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> > index a08528d9c76b..af71b87d8030 100644
> > --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> > +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> > @@ -122,7 +122,7 @@
> > #define RING_EXECLIST_STATUS_LO(base)		XE_REG((base) + 0x234)
> > #define RING_EXECLIST_STATUS_HI(base)		XE_REG((base) + 0x234 + 4)
> >
> > -#define RING_CONTEXT_CONTROL(base)		XE_REG((base) + 0x244)
> > +#define RING_CONTEXT_CONTROL(base)		XE_REG((base) + 0x244, XE_REG_OPTION_MASKED)
> > #define	  CTX_CTRL_INHIBIT_SYN_CTX_SWITCH	REG_BIT(3)
> > #define	  CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT	REG_BIT(0)
> >
> > --
> > 2.41.0
> >

  reply	other threads:[~2024-04-04 16:18 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-03 21:02 [PATCH] drm/xe: Label RING_CONTEXT_CONTROL as masked Ashutosh Dixit
2024-04-03 21:47 ` ✓ CI.Patch_applied: success for " Patchwork
2024-04-03 21:48 ` ✓ CI.checkpatch: " Patchwork
2024-04-03 21:49 ` ✓ CI.KUnit: " Patchwork
2024-04-03 22:00 ` ✓ CI.Build: " Patchwork
2024-04-03 22:04 ` ✓ CI.Hooks: " Patchwork
2024-04-03 22:05 ` ✓ CI.checksparse: " Patchwork
2024-04-03 22:40 ` ✓ CI.BAT: " Patchwork
2024-04-03 23:00 ` [PATCH] " Matt Roper
2024-04-04 12:46 ` Lucas De Marchi
2024-04-04 16:18   ` Dixit, Ashutosh [this message]
  -- strict thread matches above, loose matches on Subject: below --
2024-04-04 16:12 Ashutosh Dixit

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