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[82.66.243.121]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482c9bfd8d9sm9363469f8f.20.2026.08.24.14.31.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 Aug 2026 14:31:57 -0700 (PDT) Message-ID: <86112e29-c60b-43be-98a7-db2030640323@oss.qualcomm.com> Date: Mon, 24 Aug 2026 23:31:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/11] accel/tcg: Make halt-to-exec transition explicit and remove cpu_exec_halt Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= To: Mark Cave-Ayland , qemu-devel@nongnu.org Cc: Paolo Bonzini , Daniel Henrique Barboza , Peter Maydell , Richard Henderson , Pierrick Bouvier References: <20260819145649.23439-1-philmd@oss.qualcomm.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYwODI0MDE4MiBTYWx0ZWRfXzsSW6vFv/Kz4 mqD5e4/Vw9W/OZqM792Ehtwn0qljTLlfzwQ4fZXn+x3xUz2SmLa6oErK7LaHuzjoWrz15VzeNtE /LM1M/Ko8uCzv7XY9KxXRHy26VjqSVA= X-Proofpoint-ORIG-GUID: Os1R4HEO8Jo8g4UL1qN5_YhJ9vU903Hb X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI0MDE4MiBTYWx0ZWRfX/c/heGu3JjyE EwePNxwCdXVuzxvRPP1l2aXRaV/7txRQ6Xox6/IQyfr0Whtjw4WkC1u5LUFcwtQgY95F7GSlOI4 GcJvRxdMUbt/OJ613dfHWnrWzBJyKJDD7JAeeL3WYfmMUfpW+HRTiRmSdc1SnG8fduxCsbgOVgX DTujLrRizsrhjJg43fBg3vK6DKHnh12yxC0WGgfOwyrlIOCwpoSajO+JLxGUBvy5mSybrT7qb7S e6GxNkqTB2QbLWoiFoocGdM+Bf6V8PSjJiPhev0U5Y7g2BadZnT9kAdFpNzAT7CHQhtU4AeRPaO sdookX1rXZD+ee7tkBIsAqz77L8FhbfevqfYl+z7ZhunZlWw528qC1wKoRgnCue35Q2VC/Ymm/d NT6qAvryDVbJeDYzp4AzorhX40mZdbmg/5VN4deIOSgAbxiqVoPDRfCjaQOL+Hlp65V64NiNjds JouCgbxoogN+4qU6fWA== X-Proofpoint-GUID: Os1R4HEO8Jo8g4UL1qN5_YhJ9vU903Hb X-Authority-Analysis: v=2.4 cv=d8DFDxjE c=1 sm=1 tr=0 ts=6a8cb850 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=lbskcjEx90pOFJH4cTSgiA==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=Gxz13x8bFVTPj56d7QsA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=O8hF6Hzn-FEA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-24_06,2026-08-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 adultscore=0 priorityscore=1501 malwarescore=0 spamscore=0 phishscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608240182 Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hey Mark, On 20/8/26 11:56, Philippe Mathieu-Daudé wrote: > Hi Mark, > > On 2026-08-20 11:26, Mark Cave-Ayland wrote: >> On 19/08/2026 15:56, Philippe Mathieu-Daudé wrote: >> >> Hi Phil, >> >> No objections to the idea of the patch, however I do have a couple of >> questions: >> >>> This series was inspired by a previous thread on the list [*]. >>> >>> Refactor the CPU halt-to-execution transition logic in TCG as >>> something more explicit and composable. >>> >>> Core problem: TCGCPUOps::cpu_exec_halt callback mixed concerns, >>> it checked for work, processed async events, and handled state >>> transitions all in one place. >>> >>> Solution: introduces two dedicated callbacks: >>> >>>    * process_async_events(): Process target-specific async events >>>      before checking for work. Called early in cpu_exec(). >> >> Can you explain exactly what you mean by async events here in the >> context of TCG? Looking at the thread indicated below suggests this is >> terminology borrowed from KVM with which I am less familiar. > > "asynchronous interrupts/events that arrive (from timers, other threads) > while a vCPU is halted"? > >> >>>    * transition_halt_to_exec(): Perform target-specific state updates >>>      when transitioning from halt to execution. >> >> That's quite a name :) Would something like cpu_exec_resume() be more >> descriptive here (as well as keeping the cpu_exec_ prefix used by >> other callbacks)? > > Naming is hard, I rather something self-explaining when reading the > code; we transition the state but do not resume yet. Anyway what about > .resume_halted/resume_from_halt/resume_from_sleep/resume_execution > instead of .transition_halt_to_exec? WDYT? > >> >>> This separation allows the generic cpu_exec() code to orchestrate >>> the flow cleanly (process events, check for work, transition state). >