From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F80A1C2AF for ; Fri, 6 Oct 2023 11:13:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="l0bUeUwL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9562DC433C8; Fri, 6 Oct 2023 11:13:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696590784; bh=4VEq/zdGE6rIUqB2UMjyOy3O/+Mu2zWmW+ZJ/2EwzZw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=l0bUeUwLNUtGSsbwLqOtzm+9N/cFBI2M0O0RZqnygMLahxbYbpgdSSGMvw8ru6J3L 6X3iAEXf9ttlUqiA3CDMsyz7AZ3uJqzilnUp+57UR1mNR3rxw5UrSvHiO3mAVdLeFP YT4ZTdRG4a2wDvBsb0wuMZDJPi+cfXErDpzfmTQf2jsDynMLMZeP5RyIoBcY/cY4ja cxcNHq7gjJAISh1QM+moQOV4KenTcV40swlV2GquP+FFkpJg2+LoLe6Ke5YRHp5Xss edyX9jqJoXsN/32YjgAOhFn55mwyHL2ZIGmFDYSZhuz0D8uMbAtjjLRZ6qZl/4eI9o +GQHBBAET2fPA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qoilR-001gzZ-Jx; Fri, 06 Oct 2023 12:13:02 +0100 Date: Fri, 06 Oct 2023 12:13:00 +0100 Message-ID: <8634yongw3.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH 0/3] KVM: arm64: Load the stage-2 MMU from vcpu_load() for VHE In-Reply-To: <20231006093600.1250986-1-oliver.upton@linux.dev> References: <20231006093600.1250986-1-oliver.upton@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, kvm@vger.kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 06 Oct 2023 10:35:57 +0100, Oliver Upton wrote: > > Unlike nVHE, there is no need to switch the stage-2 MMU around on guest > entry/exit in VHE mode as the host is running at EL2. Despite this KVM > reloads the stage-2 on every guest entry, which is needless. > > This series moves the setup of the stage-2 MMU context to vcpu_load() > when running in VHE mode. This is likely to be a win across the board, > but also allows us to remove an ISB on the guest entry path for systems > with one of the speculative AT errata. > > None of my machines affected by the AT errata are VHE-capable, so it'd > be appreciated if someone could give this series a go and make sure I > haven't wrecked anything. It totally breaks on my A55 board. Running a single guest seems OK, but running a number of the concurrently makes them explode early on (faults in EFI...) I guess we end-up running with the wrong VTTBR at times, which would be interesting... M. -- Without deviation from the norm, progress is not possible.