From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A28F18A932 for ; Sun, 1 Dec 2024 12:58:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733057930; cv=none; b=LO4IzyTZhfjIOdXOnKH4GwmmybtNxMoj5IXwxbRrCV2XTNr/XEf7ummNchenKxlMXgx1HEjI1C/aZu//2lj6azdsoVBpRucN7xpGVghx9GgoJn3Ubjq/LC5rHHnCMMs2mB8ftMzEL+kJdZYRRMCpFvyh16I5cuHUvefuF7sl0i4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733057930; c=relaxed/simple; bh=K5HxLjFhSeqkuLos2FkxO1o76r5WteSqxvKnLCqq5sg=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=EhPqyrqcQMr8EKQDPxSpI5EkfD2FbjEdK9cinmBReXhKpHWMi/tU09gBhKMRlZ5S+Mx8SCFYNC3OhRb4VqWJzyJTq1w3qKu2E8l91F/tg6E4o8BgnbNcUiN+S+Zh9DpOAgOBgwLXb7s7sPGA7OisdJkFeCkui1gqxzMJshBZCGA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YBdWhTKt; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YBdWhTKt" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DE660C4CED2; Sun, 1 Dec 2024 12:58:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1733057929; bh=K5HxLjFhSeqkuLos2FkxO1o76r5WteSqxvKnLCqq5sg=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=YBdWhTKtrRzSZg7iiPmUQ5mP6g7L6pgnSwZFJmAN3jg5pDRr/T3wSL8Va9snHqycT mBHFSVjuUPcZUaatdYhje/M6zZySThO/gZZInoUD2HekUl0DlL9JGVTFRzDpS6hmSY ItgSdw3LeYeu0SAveyPJ2YVryW07CjJGKTFfJkUIl3B4oURUbax88aeBsneWHmsxp8 MkQ8coGeFcCqKcxd4+SMcbrincLUcGd5XrbHMooODI9s8QQ4TLlpm6UaS+g4zYW3Dr qA1HGqwyT6lLBcRkpglzIHD6QnfP6OPiH+rli1EXbshfT/tKJXrX3ZJSaEYC8P8g4I OmiZbSEahARoQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tHjXD-00H5cV-GZ; Sun, 01 Dec 2024 12:58:47 +0000 Date: Sun, 01 Dec 2024 12:58:47 +0000 Message-ID: <864j3nv9tk.wl-maz@kernel.org> From: Marc Zyngier To: Fuad Tabba Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev, james.clark@linaro.org, will@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, broonie@kernel.org, qperret@google.com, kristina.martsenko@arm.com Subject: Re: [PATCH v3 14/15] KVM: arm64: Convert the SVE guest vcpu flag to a vm flag In-Reply-To: <20241128123515.1709777-15-tabba@google.com> References: <20241128123515.1709777-1-tabba@google.com> <20241128123515.1709777-15-tabba@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tabba@google.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev, james.clark@linaro.org, will@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, broonie@kernel.org, qperret@google.com, kristina.martsenko@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 28 Nov 2024 12:35:14 +0000, Fuad Tabba wrote: > > The vcpu flag GUEST_HAS_SVE is per-vcpu, but it is based on what > is now a per-vm feature. Make the flag per-vm. > > Signed-off-by: Fuad Tabba > --- > arch/arm64/include/asm/kvm_emulate.h | 6 +++--- > arch/arm64/include/asm/kvm_host.h | 10 ++++++---- > arch/arm64/kvm/hyp/include/hyp/switch.h | 2 +- > arch/arm64/kvm/hyp/nvhe/hyp-main.c | 2 +- > arch/arm64/kvm/hyp/nvhe/pkvm.c | 11 +++++++---- > arch/arm64/kvm/hyp/nvhe/switch.c | 8 ++++---- > arch/arm64/kvm/hyp/vhe/switch.c | 2 +- > arch/arm64/kvm/reset.c | 2 +- > 8 files changed, 24 insertions(+), 19 deletions(-) > > diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h > index 406e99a452bf..ae6d0dc0e4ff 100644 > --- a/arch/arm64/include/asm/kvm_emulate.h > +++ b/arch/arm64/include/asm/kvm_emulate.h > @@ -620,7 +620,7 @@ static __always_inline void kvm_write_cptr_el2(u64 val) > } > > /* Resets the value of cptr_el2 when returning to the host. */ > -static __always_inline void kvm_reset_cptr_el2(struct kvm_vcpu *vcpu) > +static __always_inline void kvm_reset_cptr_el2(struct kvm *kvm) I'd rather you avoid the resulting churn: static __always_inline void kvm_reset_cptr_el2(struct kvm_vcpu *vcpu) { struct kvm *kvm = kern_hyp_va(vcpu->kvm); [...] which does the trick at zero cost. It is also more logical to keep the vcpu as a parameter, as the per-VM-ness is only an implementation detail. > { > u64 val; > > @@ -631,14 +631,14 @@ static __always_inline void kvm_reset_cptr_el2(struct kvm_vcpu *vcpu) > } else if (has_hvhe()) { > val = CPACR_ELx_FPEN; > > - if (!vcpu_has_sve(vcpu) || !guest_owns_fp_regs()) > + if (!kvm_has_sve(kvm) || !guest_owns_fp_regs()) > val |= CPACR_ELx_ZEN; > if (cpus_have_final_cap(ARM64_SME)) > val |= CPACR_ELx_SMEN; > } else { > val = CPTR_NVHE_EL2_RES1; > > - if (vcpu_has_sve(vcpu) && guest_owns_fp_regs()) > + if (kvm_has_sve(kvm) && guest_owns_fp_regs()) > val |= CPTR_EL2_TZ; > if (!cpus_have_final_cap(ARM64_SME)) > val |= CPTR_EL2_TSM; > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > index 680ecef1d7aa..c5c80c789ad0 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -331,6 +331,8 @@ struct kvm_arch { > #define KVM_ARCH_FLAG_ID_REGS_INITIALIZED 7 > /* Fine-Grained UNDEF initialised */ > #define KVM_ARCH_FLAG_FGU_INITIALIZED 8 > + /* SVE exposed to guest */ > +#define KVM_ARCH_FLAG_GUEST_HAS_SVE 9 > unsigned long flags; > > /* VM-wide vCPU feature set */ > @@ -862,8 +864,6 @@ struct kvm_vcpu_arch { > #define vcpu_set_flag(v, ...) __vcpu_set_flag((v), __VA_ARGS__) > #define vcpu_clear_flag(v, ...) __vcpu_clear_flag((v), __VA_ARGS__) > > -/* SVE exposed to guest */ > -#define GUEST_HAS_SVE __vcpu_single_flag(cflags, BIT(0)) > /* SVE config completed */ > #define VCPU_SVE_FINALIZED __vcpu_single_flag(cflags, BIT(1)) > /* KVM_ARM_VCPU_INIT completed */ > @@ -956,8 +956,10 @@ struct kvm_vcpu_arch { > KVM_GUESTDBG_USE_HW | \ > KVM_GUESTDBG_SINGLESTEP) > > -#define vcpu_has_sve(vcpu) (system_supports_sve() && \ > - vcpu_get_flag(vcpu, GUEST_HAS_SVE)) > +#define kvm_has_sve(kvm) \ > + test_bit(KVM_ARCH_FLAG_GUEST_HAS_SVE, &(kvm)->arch.flags) > +#define vcpu_has_sve(vcpu) \ > + kvm_has_sve((vcpu)->kvm) Two things: - it is definitely worth keeping the system_supports_sve() helper, so that we avoid checking flags for nothing - Since you preserve the vcpu_has_sve(), how about writing it as: #ifdef __KVM_NVHE_HYPERVISOR__ #define vcpu_has_sve(v) kvm_has_sve(kern_hyp_va((v)->kvm)) #else #define vcpu_has_sve(v) kvm_has_sve((v)->kvm) #endif which will avoid the churn in this patch, and makes it hard to get it wrong? Thanks, M. -- Without deviation from the norm, progress is not possible.