From: Marc Zyngier <maz@kernel.org>
To: Marek Vasut <marek.vasut+renesas@mailbox.org>
Cc: linux-pci@vger.kernel.org,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v2 2/4] irqchip/gic-v3: Refactor GIC600 limited to 32bit PA erratum handling
Date: Sun, 21 Jun 2026 17:59:23 +0100 [thread overview]
Message-ID: <865x3bsuc4.wl-maz@kernel.org> (raw)
In-Reply-To: <20260618220427.14325-3-marek.vasut+renesas@mailbox.org>
On Thu, 18 Jun 2026 23:02:00 +0100,
Marek Vasut <marek.vasut+renesas@mailbox.org> wrote:
>
> The GIC600 implementation is now known to be used on multiple 64-bit
> SoCs, where it has address width for AXI or APB interface configured
> to 32 bit, and it can access only the first 4GiB of physical address
> space.
>
> Rework the handling of the quirk to work around this limitation such
> that new entries can be added purely as new compatible strings, with
> no need to add additional functions or new its_quirk array entries.
>
> Suggested-by: Marc Zyngier <maz@kernel.org>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Marc Zyngier <maz@kernel.org>
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2026-06-21 16:59 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-18 22:01 [PATCH v2 0/4] PCI: rcar-gen4: irqchip/gic-v3: Handle GIC ITS Marek Vasut
2026-06-18 22:01 ` [PATCH v2 1/4] PCI: rcar-gen4: Configure AXIINTC if iMSI-RX not used Marek Vasut
2026-06-18 22:02 ` [PATCH v2 2/4] irqchip/gic-v3: Refactor GIC600 limited to 32bit PA erratum handling Marek Vasut
2026-06-21 16:59 ` Marc Zyngier [this message]
2026-06-18 22:02 ` [PATCH v2 3/4] irqchip/gic-v3: Add Renesas R-Car Gen4 erratum workaround Marek Vasut
2026-06-21 10:59 ` Thomas Gleixner
2026-06-21 22:46 ` Marek Vasut
2026-06-21 17:00 ` Marc Zyngier
2026-06-18 22:02 ` [PATCH v2 4/4] arm64: dts: renesas: r8a779g0: Add GICv3 ITS and update PCIe nodes Marek Vasut
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