From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CDF501D130E; Thu, 23 Jul 2026 08:39:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784795996; cv=none; b=L8iPKqciKVvwGAMlNSOguISPvgs790lRikzlgMhAZeHdEPD5Fv23wfVTd+J0DR6xAr0RO9DG3zJITwUYgVOil5ohRodUvJ2mBjdJFevAVlL1HqjKhGHOdPClD+h72DTw0U4mTbNT5eT+Yzv5tkQRDRhqFzQmVhMsY44G8s9KTOQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784795996; c=relaxed/simple; bh=n3PDmChtJKRiyCTqzoD+XKSjKL8ADViF5NeozrYvA3Y=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=t/chlxTyZ4bsMEPFyOrrNtg6DnkuiCtEDwHFL58mTAs6H6mLrjkh8U43cko0hCZBFLMD1FGPx6OPv57fziJMDwT0TUlhsseD6MopAb5a3apBICKBVLfEFQLUqnDHUdTVHpgycjT/FOjQt/9zd3ZX/rzFFoFCiU0EbZKx2cEs0iI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=j2ALiRRb; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="j2ALiRRb" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B2E021F000E9; Thu, 23 Jul 2026 08:39:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784795995; bh=IB4UYiop06IgcFwoYKkeqc3k0bp1CiTXd4bWs6POPqw=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=j2ALiRRbvedyBERtZDFn4ix5duih972p26M1yw1zZ2RckN2mgPPlfA8p6UvPT7ZQN GU5oQSSPU+gQksLxZSGBNS8JVlozKqSkpBr9KQvWtHVQi7pZUQXDEFkBMC3fkKGxNO N3Ra3atHQHrCWKXHuIUCXpIuObNLzb2QiFlt4326iCMYzJasqlCIapL38+uNr0kXuj tU2STtKPt3LrBk2CHxNJ58HBejUGeVy/h5dfZavihXEJWs0q8+ZP7uaQX0bOWAQwmf 27YpZ68G1hgBMpaTEEPr6kJhYPD3e6GLqUV0DWsR5JpB3gIfc2SVR4XS6gm9zFq41n DipUbwdHmVnFw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wmoy9-00000007x1I-35bL; Thu, 23 Jul 2026 08:39:53 +0000 Date: Thu, 23 Jul 2026 09:39:53 +0100 Message-ID: <867bmmdrqe.wl-maz@kernel.org> From: Marc Zyngier To: Jon Hunter Cc: Mark Rutland , "Daniel Lezcano" , Thomas Gleixner , , , Subject: Re: [PATCH] clocksource/drivers/arm_arch_timer: Mark EL2 virtual timer broken for Tegra194/234 In-Reply-To: <20260722125651.148595-1-jonathanh@nvidia.com> References: <20260722125651.148595-1-jonathanh@nvidia.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: jonathanh@nvidia.com, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 22 Jul 2026 13:56:51 +0100, Jon Hunter wrote: > > The following warning is being observed on Tegra194 and Tegra234 > platforms ... > > arch_timer: [Firmware Bug]: VHE-capable CPU without EL2 virtual timer > interrupt > > Adding the missing EL2 virtual timer in device-tree for Tegra194 and > Tegra234 is causing boot issues for both devices. > > The Tegra194 device includes a GIC-400 which defines PPIs for sec-phys, > phys, virt and hyp-phys timer interrupts (per the dt-binding > arm,arch_timer.yaml) but there is no PPI hyp-virt (EL2 virtual) timer > and hence this is not supported for this device. > > The Tegra234 device does have a PPI for the EL2 virtual timer, but > during CPU idle transitions into low-power states this timer is not > preserved currently by firmware and hence causes boot issues when CPU > idle is enabled. > > Avoid the warning for Tegra194 and Tegra234 devices by marking the EL2 > virtual timer as broken. > > Suggested-by: Marc Zyngier This isn't what I suggested at [1]. The warnings are *required*, because these systems are not compliant to the specification. Full timer support was not optional last time I checked. Thanks, M. [1] https://lore.kernel.org/all/878q898ulx.wl-maz@kernel.org/ -- Without deviation from the norm, progress is not possible.