From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1315A2036FE; Fri, 12 Sep 2025 10:25:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757672718; cv=none; b=CHbL4yh5N78ERWndZAvlsJmlYKwh72vA4zptzU9Aio3rTU7peBkou1WiTKbnPQUprKV57yNDDpIKIQHsQYDwvECwvBuaylCSbiMhRs0EY/MrrplxigYeDOd+J0ZvPgLyGPNuQq0xO7gh/Fy8BuTl+s4Ib1gMEpB9AAnUkYs7uLI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757672718; c=relaxed/simple; bh=LaKjlcVNrqtOufIBgKRAJut80OnV0EvmeIHIAl4z6JY=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=aAqjaOl+b3L+Vo7X4t5mvZ1owPsMgCA/bi1SHCIJvab6aK+bWh3QGkRdj1X/SjwwJD/Em4Rc1vZHvOGLMw7xVsZEs+erUFCb2kQ21HsX+qVT19gjXgqR5s/PUA+pFcfGgUz8ZeNOsky3jZQwvQtq4a/Zl+m1EmYTnJcNJk8Lvv8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WI1aJFIk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WI1aJFIk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 82A58C4CEF1; Fri, 12 Sep 2025 10:25:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757672716; bh=LaKjlcVNrqtOufIBgKRAJut80OnV0EvmeIHIAl4z6JY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=WI1aJFIkpslo0fVzZRKWCoEfxLrbSPYTeL5p3VMPZHKiZuMjSbRBF9EwqTSgw0Ll3 rQtMJN8c1KN3F3+xrOIMQ3qa2nOMOSyDaYGZAIcsFehQSqSc5jXaKr4aRf8FJj1MNn 0o5gsRVGcJmQYmJ6/yLFm+6i7OS9UIkmbDANsdyvfrtwxF8cR00BQJjv8RDI0UReLv IXKyQlGbqoYf7ThxST1akIxs3npwfu3X1e2PN9MMNK6STcYEhbCYNI0le8QOb4T58n 7CTzFYoqOcR+XxCl4XNo3GI05JRvUJDF7KoZW2bLqUSBY5fqqB37LBgjgOfnKuVmVU xkaKrChhIkQfg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1ux0xu-00000005eJd-14D6; Fri, 12 Sep 2025 10:25:14 +0000 Date: Fri, 12 Sep 2025 11:25:13 +0100 Message-ID: <868qikc6ie.wl-maz@kernel.org> From: Marc Zyngier To: Geert Uytterhoeven Cc: Kuninori Morimoto , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH v2 3/4] arm64: dts: renesas: Add R8A78000 X5H DTs In-Reply-To: References: <87o6rjvzf4.wl-kuninori.morimoto.gx@renesas.com> <87jz27vzec.wl-kuninori.morimoto.gx@renesas.com> <87jz24fqrg.wl-kuninori.morimoto.gx@renesas.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: geert@linux-m68k.org, kuninori.morimoto.gx@renesas.com, conor+dt@kernel.org, krzk+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 12 Sep 2025 08:37:29 +0100, Geert Uytterhoeven wrote: > > Hi Morimoto-san, > > CC maz > > On Fri, 12 Sept 2025 at 02:39, Kuninori Morimoto > wrote: > > > > + /* The Arm GIC-700AE - View 1 */ > > > > > > s/700/720/ > > > > Oops, thanks. Will fix > > > > > > + gic: interrupt-controller@39000000 { > > > > + compatible = "arm,gic-v3"; > > > > > > The documentation states it is compliant with GICv4.1? > > > > I'm not familiar with GIC. And I think there is no v4 support on Linux yet ? > > If my understanding was correct, GICv4 have GICv3 compatible. > > We can use v3 driver so far, and can be replaced to v4 driver if it was > > supported in Linux? > > 'git grep -i "\ > Marc? We don't need to differentiate the various GICv3.{0,1,2,3} and GICv4.{0,1,2} in DT. GICv3 is enough, and everything is else can be probed. And yes, we support everything (but that's not relevant for DT). > > > > > + #interrupt-cells = <3>; > > > > + #address-cells = <0>; > > > > + interrupt-controller; > > > > + redistributor-stride = <0x0 0x40000>; No. That's the architected value, and doesn't need to be described. This property is solely designed to support broken HW, and I really hope this is not the case here. > > > > + #redistributor-regions = <32>; > > > > + reg = <0 0x39000000 0 0x20000>, // GICD > > > > > > The base address is 0x38000000, according to the docs? > > > > It is indicated in very deep place in datasheet. I will indicate > > detail in v2. > > > > > > + <0 0x397C0000 0 0x40000>, // GICR Core29 > > > > + <0 0x39800000 0 0x40000>, // GICR Core30 > > > > + <0 0x39840000 0 0x40000>; // GICR Core31 This really is silly. You have *one* RD region, not 32. This single region covers all the RDs that your system has. > > > > > > No GICC, GICH, and GICV? > > > > will be added later ? > > OK. I seriously doubt you can have these regions, unless you have attached a GIC700 to an ancient core such as A53. Here, you seem to have a bunch of A720, which will *not* have the GICv2 compat regions. Thanks, M. -- Without deviation from the norm, progress is not possible.