From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13584139E for ; Fri, 31 Jan 2025 08:46:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738313177; cv=none; b=uNFHkavr6Ns/LD9737kMLWhIUbn9TDKKH/xkvn7HZwULqvtT81x7znsd2q2amrFckzWQAOfS9yQSe10jtOxmpbLxQ82GuBOg+iUVtgiwstXwSjFCbKJOm7FFa+STwUUFBOfQX2pjYQmR3ZqsyHEH36XTMUl/PK+DgiFdpmUd/tI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738313177; c=relaxed/simple; bh=Erb/cbxJJ/om2z1Ke1SymY4HRmWgNzv1Y97lwGY2w/w=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=WJqmXPzwSFm/jxCULsL2h5Fadsnnf+Cb8zHciSjfoKF8E7Dw9fkl07/QyH5BuZy8VJRYjoyRZf6YcW5kjrgDQy+ki49P73ztXGINkamYa0es29ivQZi3Raq+7N5FENPImTPcsq/B2KsnWCleEzI3tabh8MJHJS5fmzx6+IqXil4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=l0k/m0h7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="l0k/m0h7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7424DC4CED1; Fri, 31 Jan 2025 08:46:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1738313174; bh=Erb/cbxJJ/om2z1Ke1SymY4HRmWgNzv1Y97lwGY2w/w=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=l0k/m0h7531VXkdVt4CoOD57yCo3Y+rgu7h6CdfD9Zj0AadnD2mtjaB/evKKq64+/ JxFzvAHfteNXwx9RJwr0IwXewN0pjWuaDgog9VdZv+rR+B+PS4Cste6c2ngAyF24/t iVnZVu+mp7guz+qDlfCs+r93Og9IERIQJr1ic1Mffq2mnhkleuBs18FpetrP9I3T/Q 3XMfMryNThlK4By4nnoAeDqYVd3rvb2AQ96bjQkaSk96ew4rEAQlxGx1FOC/pJhvwU zm/gqpGPLsQEMu+ZYL3MOQdnj+nP+sCfEX25dHEOq4jCmqMrWKtKkvjFoXnTQJGw6Z 7bN6fwDS+4o0Q== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tdmfE-00GpS4-2H; Fri, 31 Jan 2025 08:46:12 +0000 Date: Fri, 31 Jan 2025 08:46:11 +0000 Message-ID: <868qqrv0a4.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Wei-Lin Chang , Volodymyr Babchuk , Dmytro Terletskyi , Joey Gouly , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH 3/3] KVM: arm64: timer: Consolidate NV configuration of virtual timers In-Reply-To: References: <20250128161721.3279927-1-maz@kernel.org> <20250128161721.3279927-4-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, r09922117@csie.ntu.edu.tw, Volodymyr_Babchuk@epam.com, Dmytro_Terletskyi@epam.com, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 30 Jan 2025 21:41:04 +0000, Oliver Upton wrote: > > > +void kvm_timer_vcpu_nv_init(struct kvm_vcpu *vcpu) > > +{ > > + /* > > + * A vcpu running at EL2 is in charge of the offset applied to > > + * the virtual timer, so use the physical VM offset, and point > > + * the vcpu offset to CNTVOFF_EL2. > > + * > > + * The virtual offset behaviour is "interesting", as it always > > + * applies when HCR_EL2.E2H==0, but only when accessed from EL1 when > > + * HCR_EL2.E2H==1. Apply it to the HV timer when E2H==0. > > + */ > > I'm definitely being pedantic, but all the talk of an HV timer when > E2H==0 isn't sitting well with me. Since a programmable E2H has gone > out the window there isn't such thing as an HV timer when E2H==0, as > FEAT_VHE isn't implemented for the VM. Ah, that's a very good point! > And along those lines, accesses to CNTHV_*_EL2 registers should undef > when FEAT_VHE isn't implemented for the VM but I don't think we have any > enforcement of that. Indeed. Let me fix this and add the required UNDEF behaviour. Thanks, M. -- Without deviation from the norm, progress is not possible.