From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 08EB71DDE9 for ; Sat, 21 Jun 2025 11:54:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750506849; cv=none; b=T3NalUEuwGj/WXsjyqHLCaAYGMZkju8J8HTvI1cjTd1J/xaGDtEekta/bHeZpFEI2gixy1DNhFpqIejp35lp/nhML/usPwMBiQF91WzF1duqKgL7Rruskzxf6JXoCud2UvHcGrIGnqXsWC4PSVjSFUGSmS4pdHSfSFQS3NBNMcs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750506849; c=relaxed/simple; bh=K5eMLdq6YOvf+mUwulmhL57qHFMKXEpckqXJdVb7+QU=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=a39IUltD3XOUkduR4hSlXMxyoZmn3ORwPxVXJmurb6M3yoGvappCsUGiMY3WiAKTWubpmi1IEl3v6nmcPiMlbhXeQ2xNaUXMjqpywWlw4/ePqlqzj7W8hDRHe5agsG1lOIOk5GwiAsK82j1JnAM+asm8lvKM4WKq9T7NdeZ/Hks= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Urh14lZT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Urh14lZT" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9576BC4CEE7; Sat, 21 Jun 2025 11:54:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750506848; bh=K5eMLdq6YOvf+mUwulmhL57qHFMKXEpckqXJdVb7+QU=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Urh14lZTgLBF0tvR5L1bbNR8pWx0J0NKhvxC0Bjv1Tvn+M12EvFRjtyYmcDkqAFbI ausWVBcnouAJwVZAHSp1OV+g50boEgnDGoBXv+azZuv17VyhFv24+HEThch/wrMy+6 /zL9iL4zxnM1MfPNkyF4kYT7haqOG+owL9hj8EPknPUOoiT7ak91K8goMvf4zdy6w0 fdbPaOfSDvmpbVYxomMtYRi79d7aOZoVn/dMOKtJ59ikxohl1EgtXzRdMtziOq1Avn 7oSNYB5LWlRTDVNHR/1mGSAfYbCNl9RB+k75jHl4tF4+tN4hv+Hq1ppwmZK8tR0mJh joa0jOM8uwD5A== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1uSwnO-008ngP-Go; Sat, 21 Jun 2025 12:54:06 +0100 Date: Sat, 21 Jun 2025 12:54:06 +0100 Message-ID: <86a561cntt.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, Joey Gouly , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH v2 17/27] KVM: arm64: Route SEAs to the SError vector when EASE is set In-Reply-To: <20250616230308.1192565-18-oliver.upton@linux.dev> References: <20250616230308.1192565-1-oliver.upton@linux.dev> <20250616230308.1192565-18-oliver.upton@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 17 Jun 2025 00:02:58 +0100, Oliver Upton wrote: > > One of the finest additions of FEAT_DoubleFault2 is the ability for > software to request *synchronous* external aborts be taken to the > SError vector, which of coure are *asynchronous* in nature. > > Opinions be damned, implement the architecture and send SEAs to the > SError vector if EASE is set for the target context. As they say, there is no accounting for taste! :) > > Signed-off-by: Oliver Upton > --- > arch/arm64/kvm/emulate-nested.c | 3 +++ > arch/arm64/kvm/hyp/exception.c | 6 +++++- > arch/arm64/kvm/inject_fault.c | 38 ++++++++++++++++++++++++++++++++- > 3 files changed, 45 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c > index 86c9a48fc8b6..7f9081c6ab11 100644 > --- a/arch/arm64/kvm/emulate-nested.c > +++ b/arch/arm64/kvm/emulate-nested.c > @@ -2833,6 +2833,9 @@ int kvm_inject_nested_sea(struct kvm_vcpu *vcpu, bool iabt, u64 addr) > iabt ? ESR_ELx_EC_IABT_LOW : ESR_ELx_EC_DABT_LOW); > esr |= ESR_ELx_FSC_EXTABT | ESR_ELx_IL; > > + if (__vcpu_sys_reg(vcpu, SCTLR2_EL2) & SCTLR2_EL1_EASE) > + return kvm_inject_nested(vcpu, esr, except_type_serror); Are we allowed to not set FAR_EL2 here? My reading of R_RYXCL is that only the exception vector changes, not what is reported. But the spec is clear as mud, and I wonder if I'm reading too much into it. Thanks, M. -- Without deviation from the norm, progress is not possible.