From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A95D111A4 for ; Fri, 20 Oct 2023 09:21:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dk6keR7e" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6D5C0C433C9; Fri, 20 Oct 2023 09:21:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1697793666; bh=5acvZfHG+Td5gEft4rLHRBU1/ewqNTvB2G7cCYmr3lo=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=dk6keR7eDDJeaMBNQRw/WKxkOa4I7cJBa0EuJkGfIqmRRlCcnS5Odtw1d3JekucMb kO/wHxlFgDvCufnMEa0wDg5/CyezSOmSyIw3mLkJM6SJm0fGy44gfSmpWRWQ7VGgXL eb/o7LedkPTU/CKqAhFXaFvc5Nw/jnyqs8OO7HXbnUNXv6ygQ/VH55Nijp1sjilEa5 CT0S/ZHzQnmaDcKERW/R/dHnL0AEccYLaqHMA0QW4WcOj1Wo8wbW3S2TMwh/WWBKXU VhMG/y4J08zzcP5OSrPnLlbkne6pBlVPC8X92mx4H9RkYHqQ7JccL06VB73A/Uwzcw DNnx3Up5KUU9Q== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qtlgl-0063mj-S9; Fri, 20 Oct 2023 10:21:03 +0100 Date: Fri, 20 Oct 2023 10:21:02 +0100 Message-ID: <86a5sdmyyp.wl-maz@kernel.org> From: Marc Zyngier To: Ryan Roberts Cc: Catalin Marinas , Will Deacon , Oliver Upton , Suzuki K Poulose , James Morse , Zenghui Yu , Ard Biesheuvel , Anshuman Khandual , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Subject: Re: [PATCH v4 07/12] KVM: arm64: Prepare TCR_EL2.PS in cpu_prepare_hyp_mode() In-Reply-To: <20231009185008.3803879-8-ryan.roberts@arm.com> References: <20231009185008.3803879-1-ryan.roberts@arm.com> <20231009185008.3803879-8-ryan.roberts@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: ryan.roberts@arm.com, catalin.marinas@arm.com, will@kernel.org, oliver.upton@linux.dev, suzuki.poulose@arm.com, james.morse@arm.com, yuzenghui@huawei.com, ardb@kernel.org, anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 09 Oct 2023 19:50:03 +0100, Ryan Roberts wrote: > > With the addition of LPA2 support in the hypervisor, the PA size > supported by the HW must be capped with a runtime decision, rather than > simply using a compile-time decision based on PA_BITS. For example, on a > system that advertises 52 bit PA but does not support FEAT_LPA2, A 4KB > or 16KB kernel compiled with LPA2 support must still limit the PA size > to 48 bits. > > Therefore, move the insertion of the PS field into TCR_EL2 out of > __kvm_hyp_init assembly code and instead do it in cpu_prepare_hyp_mode() > where the rest of TCR_EL2 is prepared. This allows us to figure out PS > with kvm_get_parange(), which has the appropriate logic to ensure the > above requirement. (and the PS field of VTCR_EL2 is already populated > this way). > > Signed-off-by: Ryan Roberts > --- > arch/arm64/kvm/arm.c | 3 +++ > arch/arm64/kvm/hyp/nvhe/hyp-init.S | 4 ---- > 2 files changed, 3 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c > index 73cc67c2a8a7..0bb8918475d2 100644 > --- a/arch/arm64/kvm/arm.c > +++ b/arch/arm64/kvm/arm.c > @@ -1726,6 +1726,7 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits) > { > struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu); > unsigned long tcr; > + u64 mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); nit: move this one up by a line (yes, I'm being difficult). > > /* > * Calculate the raw per-cpu offset without a translation from the > @@ -1747,6 +1748,8 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits) > } > tcr &= ~TCR_T0SZ_MASK; > tcr |= TCR_T0SZ(hyp_va_bits); > + tcr &= ~TCR_EL2_PS_MASK; > + tcr |= FIELD_PREP(TCR_EL2_PS_MASK, kvm_get_parange(mmfr0)); > if (system_supports_lpa2()) > tcr |= TCR_EL2_DS; > params->tcr_el2 = tcr; > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S > index 1cc06e6797bd..f62a7d360285 100644 > --- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S > @@ -122,11 +122,7 @@ alternative_if ARM64_HAS_CNP > alternative_else_nop_endif > msr ttbr0_el2, x2 > > - /* > - * Set the PS bits in TCR_EL2. > - */ > ldr x0, [x0, #NVHE_INIT_TCR_EL2] > - tcr_compute_pa_size x0, #TCR_EL2_PS_SHIFT, x1, x2 > msr tcr_el2, x0 > > isb Ah, this is where this was hiding. This should be folded into the previous patch for consistency (this is otherwise non bisectable). Thanks, M. -- Without deviation from the norm, progress is not possible. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7F716CDB47E for ; Fri, 20 Oct 2023 09:21:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=e6Fjg0ptRY4cAxcle0e7U7fwbpVlppCOOp+bLZwpOp8=; b=KSiH91p7tDCJVQ s8bzGk1KA83FqptBuzl0HNSSGyM5CMgpiixgKS67BpAosPgqBNPv9dr0/yhpRljgKpaR97yz5rxVo 3rf+RENyBVbvXo+g+pyBjuB9FFqteQpUNKoNEQUK03q0pqRY3B9VOFf85tQ/ZPKdZnZZU4cAL9Ibe LUWJIuJHtFGeWNdQXwbAj+MHSE4sMrXFljKEgMUNTe+NDGLcVZ+fyacL/BTr2ZolQTXGM2PaIi7JN wzI/jjUnmYm7YUPGVyzPnlJLVFXOJWhvBsRNFUL9NvLveUMRM4anEAb6qOntHYhdv/SPMBlswA5VA 4HLwFMTTaAcSRnsCn8rQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qtlgs-001fNN-0J; Fri, 20 Oct 2023 09:21:10 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qtlgp-001fMt-1G for linux-arm-kernel@lists.infradead.org; Fri, 20 Oct 2023 09:21:08 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id C2A6B61FA8; Fri, 20 Oct 2023 09:21:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6D5C0C433C9; Fri, 20 Oct 2023 09:21:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1697793666; bh=5acvZfHG+Td5gEft4rLHRBU1/ewqNTvB2G7cCYmr3lo=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=dk6keR7eDDJeaMBNQRw/WKxkOa4I7cJBa0EuJkGfIqmRRlCcnS5Odtw1d3JekucMb kO/wHxlFgDvCufnMEa0wDg5/CyezSOmSyIw3mLkJM6SJm0fGy44gfSmpWRWQ7VGgXL eb/o7LedkPTU/CKqAhFXaFvc5Nw/jnyqs8OO7HXbnUNXv6ygQ/VH55Nijp1sjilEa5 CT0S/ZHzQnmaDcKERW/R/dHnL0AEccYLaqHMA0QW4WcOj1Wo8wbW3S2TMwh/WWBKXU VhMG/y4J08zzcP5OSrPnLlbkne6pBlVPC8X92mx4H9RkYHqQ7JccL06VB73A/Uwzcw DNnx3Up5KUU9Q== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qtlgl-0063mj-S9; Fri, 20 Oct 2023 10:21:03 +0100 Date: Fri, 20 Oct 2023 10:21:02 +0100 Message-ID: <86a5sdmyyp.wl-maz@kernel.org> From: Marc Zyngier To: Ryan Roberts Cc: Catalin Marinas , Will Deacon , Oliver Upton , Suzuki K Poulose , James Morse , Zenghui Yu , Ard Biesheuvel , Anshuman Khandual , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Subject: Re: [PATCH v4 07/12] KVM: arm64: Prepare TCR_EL2.PS in cpu_prepare_hyp_mode() In-Reply-To: <20231009185008.3803879-8-ryan.roberts@arm.com> References: <20231009185008.3803879-1-ryan.roberts@arm.com> <20231009185008.3803879-8-ryan.roberts@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: ryan.roberts@arm.com, catalin.marinas@arm.com, will@kernel.org, oliver.upton@linux.dev, suzuki.poulose@arm.com, james.morse@arm.com, yuzenghui@huawei.com, ardb@kernel.org, anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231020_022107_511583_CA67236D X-CRM114-Status: GOOD ( 26.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 09 Oct 2023 19:50:03 +0100, Ryan Roberts wrote: > > With the addition of LPA2 support in the hypervisor, the PA size > supported by the HW must be capped with a runtime decision, rather than > simply using a compile-time decision based on PA_BITS. For example, on a > system that advertises 52 bit PA but does not support FEAT_LPA2, A 4KB > or 16KB kernel compiled with LPA2 support must still limit the PA size > to 48 bits. > > Therefore, move the insertion of the PS field into TCR_EL2 out of > __kvm_hyp_init assembly code and instead do it in cpu_prepare_hyp_mode() > where the rest of TCR_EL2 is prepared. This allows us to figure out PS > with kvm_get_parange(), which has the appropriate logic to ensure the > above requirement. (and the PS field of VTCR_EL2 is already populated > this way). > > Signed-off-by: Ryan Roberts > --- > arch/arm64/kvm/arm.c | 3 +++ > arch/arm64/kvm/hyp/nvhe/hyp-init.S | 4 ---- > 2 files changed, 3 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c > index 73cc67c2a8a7..0bb8918475d2 100644 > --- a/arch/arm64/kvm/arm.c > +++ b/arch/arm64/kvm/arm.c > @@ -1726,6 +1726,7 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits) > { > struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu); > unsigned long tcr; > + u64 mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); nit: move this one up by a line (yes, I'm being difficult). > > /* > * Calculate the raw per-cpu offset without a translation from the > @@ -1747,6 +1748,8 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits) > } > tcr &= ~TCR_T0SZ_MASK; > tcr |= TCR_T0SZ(hyp_va_bits); > + tcr &= ~TCR_EL2_PS_MASK; > + tcr |= FIELD_PREP(TCR_EL2_PS_MASK, kvm_get_parange(mmfr0)); > if (system_supports_lpa2()) > tcr |= TCR_EL2_DS; > params->tcr_el2 = tcr; > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S > index 1cc06e6797bd..f62a7d360285 100644 > --- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S > @@ -122,11 +122,7 @@ alternative_if ARM64_HAS_CNP > alternative_else_nop_endif > msr ttbr0_el2, x2 > > - /* > - * Set the PS bits in TCR_EL2. > - */ > ldr x0, [x0, #NVHE_INIT_TCR_EL2] > - tcr_compute_pa_size x0, #TCR_EL2_PS_SHIFT, x1, x2 > msr tcr_el2, x0 > > isb Ah, this is where this was hiding. This should be folded into the previous patch for consistency (this is otherwise non bisectable). Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel