From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C69C1F3BAE for ; Sat, 21 Jun 2025 11:34:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750505658; cv=none; b=Ppucq6ezywztrPiXRJ2AlFfUozgexHoXtwXoOhdYl8v7LTP6FtB7KD+0cU3tvnMjfx3R9khOJ3ZCjPtTS3VV/q6nR7tYHZ45aKzm4HSMFLiF1opX73qzlBgqXCt/+e30VrIx3EfQ686WI5okLycRG+fiB/4wcgJaJDQ89lzOg74= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750505658; c=relaxed/simple; bh=9l5F57l5XT9qcuTDRaflhG1AFy3rJPJGxrV+T73Ea0g=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=eL9+rUX46WcBmz8p8RS0ZzX68AlMkc84lLklx998xhiCUEqPy2sK8CyuBQCfvp5opjmgX8ZlFM4WK/eFScKsLIP5GkF0aAVba1d2oWFoeBBLpDiNGbcGsJh2oI6VxppHM267kRXVdLe5FGSi7jtKcEPmFzq4CthPFI1dJSqgjkQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Q0pEcXgq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Q0pEcXgq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D3B2EC4CEE7; Sat, 21 Jun 2025 11:34:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750505656; bh=9l5F57l5XT9qcuTDRaflhG1AFy3rJPJGxrV+T73Ea0g=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Q0pEcXgqrPZ9obS9pd0xGq1avYm8+FcVk8EqA3buCqg/xNBb7vSPL6w6bbhaRB1Ap h29wiVQha6Ty/+mgRTcHIhSR91OGRnAq8ugw+WR5/5IXbWiJRHvmWKj27Um6zcxhRn VgbT5rEaXWo/bfKP5SvbBdzrTz4tEETE1h6IuEeTgXLDO8hHxtGfRQVaSjmm3QP3kP uppgBVmHUmYVetF0HaB3nVpDSyJV7/XQKNuo2SL0V7fZFEfGZCqtdSBzL7vFKQ0lpd c4ylYDUSLSomqeeD6GlQGrBgzxT616w1bpbIBqUUas4qJkyNa0JWP2Ze2dp8qIoLZk xS0baMZF1jRFQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1uSwUA-008nXi-KR; Sat, 21 Jun 2025 12:34:14 +0100 Date: Sat, 21 Jun 2025 12:34:14 +0100 Message-ID: <86bjqhcoqx.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, Joey Gouly , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH v2 14/27] KVM: arm64: Describe SCTLR2_ELx RESx masks In-Reply-To: <20250616230308.1192565-15-oliver.upton@linux.dev> References: <20250616230308.1192565-1-oliver.upton@linux.dev> <20250616230308.1192565-15-oliver.upton@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 17 Jun 2025 00:02:55 +0100, Oliver Upton wrote: > > External abort injection will soon rely on a sanitised view of > SCTLR2_ELx to determine exception routing. Compute the RESx masks. > > Signed-off-by: Oliver Upton > --- > arch/arm64/kvm/config.c | 28 ++++++++++++++++++++++++++++ > arch/arm64/kvm/nested.c | 6 ++++++ > 2 files changed, 34 insertions(+) > > diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c > index 54911a93b001..e8a33e91e665 100644 > --- a/arch/arm64/kvm/config.c > +++ b/arch/arm64/kvm/config.c > @@ -131,6 +131,8 @@ struct reg_bits_to_feat_map { > #define FEAT_SPMU ID_AA64DFR1_EL1, SPMU, IMP > #define FEAT_SPE_nVM ID_AA64DFR2_EL1, SPE_nVM, IMP > #define FEAT_STEP2 ID_AA64DFR2_EL1, STEP, IMP > +#define FEAT_SYSREG128 ID_AA64ISAR2_EL1, SYSREG_128, IMP > +#define FEAT_CPA2 ID_AA64ISAR3_EL1, CPA, CPA2 > > static bool not_feat_aa64el3(struct kvm *kvm) > { > @@ -832,6 +834,23 @@ static const struct reg_bits_to_feat_map hcr_feat_map[] = { > NEEDS_FEAT_FIXED(HCR_EL2_E2H, compute_hcr_e2h), > }; > > +static const struct reg_bits_to_feat_map sctlr2_feat_map[] = { > + NEEDS_FEAT(SCTLR2_EL1_NMEA | > + SCTLR2_EL1_EASE, > + FEAT_DoubleFault2), > + NEEDS_FEAT(SCTLR2_EL1_EnADERR, feat_aderr), > + NEEDS_FEAT(SCTLR2_EL1_EnANERR, feat_anerr), > + NEEDS_FEAT(SCTLR2_EL1_EnIDCP128, FEAT_SYSREG128), > + NEEDS_FEAT(SCTLR2_EL1_EnPACM | > + SCTLR2_EL1_EnPACM0, > + feat_pauth_lr), > + NEEDS_FEAT(SCTLR2_EL1_CPTA | > + SCTLR2_EL1_CPTA0 | > + SCTLR2_EL1_CPTM | > + SCTLR2_EL1_CPTM0, > + FEAT_CPA2), > +}; > + > static void __init check_feat_map(const struct reg_bits_to_feat_map *map, > int map_size, u64 res0, const char *str) > { > @@ -863,6 +882,8 @@ void __init check_feature_map(void) > __HCRX_EL2_RES0, "HCRX_EL2"); > check_feat_map(hcr_feat_map, ARRAY_SIZE(hcr_feat_map), > HCR_EL2_RES0, "HCR_EL2"); > + check_feat_map(sctlr2_feat_map, ARRAY_SIZE(sctlr2_feat_map), > + SCTLR2_EL1_RES0, "SCTLR2_EL1"); > } > > static bool idreg_feat_match(struct kvm *kvm, const struct reg_bits_to_feat_map *map) > @@ -1077,6 +1098,13 @@ void get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg, u64 *res0, u64 *r > *res0 |= HCR_EL2_RES0 | (mask & ~fixed); > *res1 = HCR_EL2_RES1 | (mask & fixed); > break; > + case SCTLR2_EL1: > + case SCTLR2_EL2: > + *res0 = compute_res0_bits(kvm, sctlr2_feat_map, > + ARRAY_SIZE(sctlr2_feat_map), 0, 0); > + *res0 |= SCTLR2_EL1_RES0; > + *res1 = SCTLR2_EL1_RES1; > + break; This is potentially mis-describing SCTLR2_EL2.EMEC, which is conditioned on FEAT_MEC. This isn't a huge deal at this stage, but may become useful if MEC gets expanded to non-Realm PAS. I think it'd be worth adding a SCTLR2_EL2-specific table for this. Thanks, M. -- Without deviation from the norm, progress is not possible.