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[91.141.74.240]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a1bd67b125sm10387095e9.3.2026.10.14.12.39.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2026 12:39:48 -0700 (PDT) From: Stefan =?UTF-8?B?RMO2c2luZ2Vy?= To: linux-arm-kernel@lists.infradead.org, Navid Ghahremani Cc: arnd@arndb.de, krzk@kernel.org, Navid Ghahremani , Stephen Boyd , Brian Masney , Jerome Brunet , Philipp Zabel , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH v2 06/24] clk: zte: Add ZX279128S CRM clock and reset driver Date: Wed, 14 Oct 2026 21:39:42 +0200 Message-ID: <86bpNzKYRniAzc8v_5Lpqg@gmail.com> In-Reply-To: <20261014072109.1759502-7-ghahramani.navid@gmail.com> References: <20261014072109.1759502-1-ghahramani.navid@gmail.com> <20261014072109.1759502-7-ghahramani.navid@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="nextPart0ktEb2oPSPiRPHnKcsrTTw"; micalg="pgp-sha256"; protocol="application/pgp-signature" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261014_123951_753775_270C8C54 X-CRM114-Status: GOOD ( 12.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --nextPart0ktEb2oPSPiRPHnKcsrTTw Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8"; protected-headers="v1" From: Stefan =?UTF-8?B?RMO2c2luZ2Vy?= Date: Wed, 14 Oct 2026 21:39:42 +0200 Message-ID: <86bpNzKYRniAzc8v_5Lpqg@gmail.com> In-Reply-To: <20261014072109.1759502-7-ghahramani.navid@gmail.com> MIME-Version: 1.0 Hi, Am Mittwoch, 14. Oktober 2026, 09:20:46 Mitteleurop=C3=A4ische Sommerzeit s= chrieb=20 Navid Ghahremani: > Support the top CRM and low-speed peripheral clock controllers of the > ZTE ZX279128S SoC. Implement custom reset controller ops mapping > logical reset IDs to internal hardware register offsets, and provide > CRM2 clock gating and reset controller support for PCIe. >=20 > Signed-off-by: Navid Ghahremani The comments I sent for v1 still apply to v2 I think. Please try to reuse the infrastructure in place for zx29. Ideally clk- zx279128s.c should be just static data and a minimalistic _probe function t= hat=20 invokes zx_clk_common_probe(). The drivers/clk/zte code is upstream in linux-next already. The MFD and res= et=20 parts are still missing though. --nextPart0ktEb2oPSPiRPHnKcsrTTw Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. 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