From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CB1B16D303 for ; Thu, 4 Jul 2024 09:05:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720083908; cv=none; b=n9hZenCD7z2gaMO64QCJUCRYETON4C/M84RwJcg1pKfb9bzywto8vCrp2dgR/77lZxitvmkArJhE+SDm5QALvy/Wgw3xdwWhImZaeA+R5kvfWpDsJfpxtjVplrvokuL3JZ6+yXHeH/eE5veNxa3xdFQRrB1a54Qt8wC0RiaeKZo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720083908; c=relaxed/simple; bh=HT+Pmh784cgIWcaD93R7htk85VVOdEkMHUzpjkiJ1oo=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=Ml00sfUflUJX+mY8K4ZKtohe+4Wg5wdpqf+vZJYVybFgoWzDYV+9jj/16jqoog8FGTW5/YZyEQ8StQ+Z5csRQMRLWpIi8MeWJYhvBiQqWs0lmmShs9YHnmb96Sxin1nlEVh1FG71lNDXSpNg3F6mrWLa8parG5pakXbmsj9c2XU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jgwrfsEa; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jgwrfsEa" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6AB0BC3277B; Thu, 4 Jul 2024 09:05:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1720083908; bh=HT+Pmh784cgIWcaD93R7htk85VVOdEkMHUzpjkiJ1oo=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=jgwrfsEahTVjC2Skl930DegpKd272w9RmBBkmh/YIgNoKhKKvhZ0wRuox0Wd/2ZQc rJ4zk5/VUrpcsmWQ2sjCnKirsUh9hr6N0uaLhORsYUYmbDtZHKO0euX5wm4uFQ/aNH FfkrSggWEFvzYM3/+brrT3HeiLiX2tvUVUCR4NDIybDPcEeFwdfUX/VSISoti6UpYr U/IsFmURH8LUcFqD5GtJYO4BQ/Z0ZugRL0rzlSWQSp/SCSktmdQVT0uAcjzc6n/xvh UZcUJUPVgiVOfzeA3BZZqLPnAfGT6D0PqfQEHaNvnFW6NwaESWPPU2LGGStwejam/B lBAF2VRO6m5VA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sPIOn-009hbf-Uk; Thu, 04 Jul 2024 10:05:06 +0100 Date: Thu, 04 Jul 2024 10:05:05 +0100 Message-ID: <86cynt4jem.wl-maz@kernel.org> From: Marc Zyngier To: Catalin Marinas Cc: kernel test robot , James Morse , oe-kbuild-all@lists.linux.dev, Linux Memory Management List , "Russell King (Oracle)" , Jonathan Cameron Subject: Re: [linux-next:master 9019/10049] drivers/irqchip/irq-gic-v3.c:47:23: warning: 'broken_rdists' defined but not used In-Reply-To: References: <202407021807.cBuWVBVa-lkp@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.3 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: oe-kbuild-all@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: catalin.marinas@arm.com, lkp@intel.com, james.morse@arm.com, oe-kbuild-all@lists.linux.dev, linux-mm@kvack.org, rmk+kernel@armlinux.org.uk, Jonathan.Cameron@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 04 Jul 2024 09:52:16 +0100, Catalin Marinas wrote: > > On Tue, Jul 02, 2024 at 06:40:12PM +0800, kernel test robot wrote: > > tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master > > head: 82e4255305c554b0bb18b7ccf2db86041b4c8b6e > > commit: d633da5d3ab1a0eb26a2213d65da1e189e82f8ab [9019/10049] irqchip/gic-v3: Add support for ACPI's disabled but 'online capable' CPUs > > config: arm-randconfig-r034-20220810 (https://download.01.org/0day-ci/archive/20240702/202407021807.cBuWVBVa-lkp@intel.com/config) > > compiler: arm-linux-gnueabi-gcc (GCC) 13.2.0 > > reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240702/202407021807.cBuWVBVa-lkp@intel.com/reproduce) > > > > If you fix the issue in a separate patch/commit (i.e. not just a new version of > > the same patch/commit), kindly add following tags > > | Reported-by: kernel test robot > > | Closes: https://lore.kernel.org/oe-kbuild-all/202407021807.cBuWVBVa-lkp@intel.com/ > > > > All warnings (new ones prefixed by >>): > > > > >> drivers/irqchip/irq-gic-v3.c:47:23: warning: 'broken_rdists' defined but not used [-Wunused-variable] > > 47 | static struct cpumask broken_rdists __read_mostly; > > | ^~~~~~~~~~~~~ > > > > > > vim +/broken_rdists +47 drivers/irqchip/irq-gic-v3.c > > This can happen when building on arm32 with SMP disabled. So we either > add a __maybe_unused annotation or we move the variable further down in > the CONFIG_SMP block. Marc, what's your preference? > > -----------8<---------------------- > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c > index c29b424d1d0c..6393f3d780e9 100644 > --- a/drivers/irqchip/irq-gic-v3.c > +++ b/drivers/irqchip/irq-gic-v3.c > @@ -47,7 +47,7 @@ static u8 dist_prio_nmi __ro_after_init = GICV3_PRIO_NMI; > > #define GIC_IRQ_TYPE_PARTITION (GIC_IRQ_TYPE_LPI + 1) > > -static struct cpumask broken_rdists __read_mostly; > +static struct cpumask broken_rdists __read_mostly __maybe_unused; > > struct redist_region { > void __iomem *redist_base; > -----------8<---------------------- > > or, > > -----------8<---------------------- > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c > index c29b424d1d0c..187948f41bb3 100644 > --- a/drivers/irqchip/irq-gic-v3.c > +++ b/drivers/irqchip/irq-gic-v3.c > @@ -47,8 +47,6 @@ static u8 dist_prio_nmi __ro_after_init = GICV3_PRIO_NMI; > > #define GIC_IRQ_TYPE_PARTITION (GIC_IRQ_TYPE_LPI + 1) > > -static struct cpumask broken_rdists __read_mostly; > - > struct redist_region { > void __iomem *redist_base; > phys_addr_t phys_base; > @@ -1316,6 +1314,8 @@ static void gic_cpu_init(void) > > #ifdef CONFIG_SMP > > +static struct cpumask broken_rdists __read_mostly; > + > #define MPIDR_TO_SGI_RS(mpidr) (MPIDR_RS(mpidr) << ICC_SGI1R_RS_SHIFT) > #define MPIDR_TO_SGI_CLUSTER_ID(mpidr) ((mpidr) & ~0xFUL) The second version seems to be the most logical one, since we already have this SMP-only block (note to self: constraint GICv3 support to SMP only at the earliest opportunity). Feel free to add my Acked-by: Marc Zyngier if you decide to push a fix on top of this branch. Thanks, M. -- Without deviation from the norm, progress is not possible.