From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE7B3E7C4CE for ; Wed, 4 Oct 2023 15:33:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ItB9w7BcHd2lilyqf/3aQB0khfCbH9AyLmHDkHheBMs=; b=Hp9SWmSo2pz3hz VZ96HtHODPXGDrP5WM7CkltJgnnCPpTccjjSdA/r9XtEL1Jw4f5ZAn+JYICqASSBf2iLkLLY3jrVw bH/rNJVhnFKxwkiBddMEpjLFlFO0wuhEoZWWnhyB6bmHVZUqaXX9UkDUnTfI8vo676ROQqK8EU2PO 2ednauCHTKDX94bW9M6GkA7MzJMQZbdaBQIrn3X4t5sDKfj/nDedeuDnIYkF5IR2Y1yADzesfa+zL hcOHF8j0stmETsMtAqA9iFDVCoPTnodtmffwNJIaSvU7UJ2NZfe80Y7HfuTMrlxGdz/yk8UfPRvO4 kSAzluzI2ua5tq4TZPVQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qo3rt-000MbH-1q; Wed, 04 Oct 2023 15:32:57 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qo3ro-000Ma4-3C for linux-riscv@lists.infradead.org; Wed, 04 Oct 2023 15:32:56 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by ams.source.kernel.org (Postfix) with ESMTP id 8989AB81CF1; Wed, 4 Oct 2023 15:32:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DEFEBC433C7; Wed, 4 Oct 2023 15:32:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696433570; bh=Na16UD/s1oSoqnUU7cLXvGvYgsS3in1QKmZWnqaLLM8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=UlRUnRxR4Knt/zA1ssgoCg17S7pcXjBahn655ReiBJ/eLOS5x/vT0cNWB+zftQ7/2 yWHdSS4rhR4Y0oYGHmClcdBh+rL5reJPF0yPyFNod0LOv7pAnVYN4KuKVm7jIfjyeQ pDpDvD5yer+ZQ4AejEO6htlgMPAmFHk/BTrXNKrjScnABeZAjuh+SwuMxa/eQ/YDnh gT476gABsmUxf1Wf8BNSuBOjsDQ77L2uJuzR8Xc1TeJjZyJxiR2K0gndCzA8ioimm5 DI9yGP7EjGgXIdZaqDV2kfk/tk5FuRuzef7jQVHgaXiIW6U60lPqTU96T6EOEikSvm mLjqOI8PHOVaA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qo3rk-0016Ui-GG; Wed, 04 Oct 2023 16:32:48 +0100 Date: Wed, 04 Oct 2023 16:32:47 +0100 Message-ID: <86cyxuo128.wl-maz@kernel.org> From: Marc Zyngier To: Anup Patel Cc: Dmitry Dunaev , dunaich@mail.ru, Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH] irqchip/riscv-intc: Mark INTC nodes for secondary CPUs as initialized. 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List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org T24gV2VkLCAwNCBPY3QgMjAyMyAxNTo1OTozMyArMDEwMCwKQW51cCBQYXRlbCA8YXBhdGVsQHZl bnRhbmFtaWNyby5jb20+IHdyb3RlOgo+IAo+IE9uIFdlZCwgT2N0IDQsIDIwMjMgYXQgMzo0OOKA r1BNIE1hcmMgWnluZ2llciA8bWF6QGtlcm5lbC5vcmc+IHdyb3RlOgo+ID4KPiA+IE9uIFR1ZSwg MjYgU2VwIDIwMjMgMTE6MzY6MzEgKzAxMDAsCj4gPiBBbnVwIFBhdGVsIDxhcGF0ZWxAdmVudGFu YW1pY3JvLmNvbT4gd3JvdGU6Cj4gPiA+Cj4gPiA+IE9uIFR1ZSwgU2VwIDI2LCAyMDIzIGF0IDM6 NTnigK9QTSBEbWl0cnkgRHVuYWV2IDxkdW5hZXZAdGVjb24ucnU+IHdyb3RlOgo+ID4gPiA+Cj4g PiA+ID4gVGhlIGN1cnJlbnQgTGludXggZHJpdmVyIGlycS1yaXNjdi1pbnRjIGluaXRpYWxpemUg SVJRIGRvbWFpbiBvbmx5IG9uY2UsCj4gPiA+ID4gd2hlbiBpbml0IGZ1bmN0aW9uIGNhbGxlZCBv biBwcmltYXJ5IGhhcnQuIEluIG90aGVyIGNhc2VzIG5vIElSUSBkb21haW4gaXMKPiA+ID4gPiBj cmVhdGVkIGFuZCBubyBvcGVyYXRpb24gb24gaW50ZXJydXB0LWNvbnRyb2xsZXIgbm9kZSBpcyBw ZXJmb3JtZWQuCj4gPiA+ID4gVGhpcyBpcyBjYXVzZSBvZiB0aGF0IG5vIGNvbW1vbiBMaW51eCBk cml2ZXIgY2FuIHVzZSBwZXItY3B1IGludGVycnVwdHMKPiA+ID4gPiBtYXBwZWQgdG8gc2V2ZXJh bCBDUFVzIGJlY2F1c2UgZndub2RlIG9mIHNlY29uZGFyeSBjb3JlcyBJTlRDIGlzIG5vdAo+ID4g PiA+IG1hcmtlZCBhcyBpbml0aWFsaXplZC4gVGhpcyBkZXZpY2UgaXMgYWx3YXlzIHdpbGwgYmUg bWFya2VkIGFzIGRlZmVycmVkLgo+ID4gPiA+IEZvciBleGFtcGxlIHRoZSBzeXN0ZW0gd2l0aCBk ZXZpY2V0cmVlCj4gPiA+ID4KPiA+ID4gPiAgICAgY3B1MDogY3B1QDAgewo+ID4gPiA+ICAgICAg ICAgY3B1MF9pbnRjOiBpbnRlcnJ1cHQtY29udHJvbGxlciB7Cj4gPiA+ID4gICAgICAgICAgICAg aW50ZXJydXB0LWNvbnRyb2xsZXI7Cj4gPiA+ID4gICAgICAgICAgICAgY29tcGF0aWJsZSA9IHJp c2N2LGNwdS1pbnRjOwo+ID4gPiA+ICAgICAgICAgfTsKPiA+ID4gPiAgICAgfTsKPiA+ID4gPgo+ ID4gPiA+ICAgICBjcHUxOiBjcHVAMSB7Cj4gPiA+ID4gICAgICAgICBjcHUxX2ludGM6IGludGVy cnVwdC1jb250cm9sbGVyIHsKPiA+ID4gPiAgICAgICAgICAgICBpbnRlcnJ1cHQtY29udHJvbGxl cjsKPiA+ID4gPiAgICAgICAgICAgICBjb21wYXRpYmxlID0gcmlzY3YsY3B1LWludGM7Cj4gPiA+ ID4gICAgICAgICB9Owo+ID4gPiA+ICAgICB9Owo+ID4gPiA+Cj4gPiA+ID4gICAgIGJ1c2VyciB7 Cj4gPiA+ID4gICAgICAgICBjb21wYXRpYmxlID0gcmlzY3YsYnVzZXJyOwo+ID4gPiA+ICAgICAg ICAgaW50ZXJydXB0cy1leHRlbmRlZCA9IDwmY3B1MF9pbnRjIDE2ICZjcHUxX2ludGMgMTY+Owo+ ID4gPiA+ICAgICB9Owo+ID4gPiA+Cj4gPiA+ID4gd2lsbCBhbHdheXMgcmVwb3J0ICdidXNlcnIn IG5vZGUgYXMgZGVmZXJyZWQgd2l0aG91dCBjYWxsaW5nIGFueQo+ID4gPiA+IGJ1cyBwcm9iZSBm dW5jdGlvbi4KPiA+ID4gPgo+ID4gPiA+IFRoaXMgcGF0Y2ggd2lsbCBtYXJrIGFsbCBzZWNvbmRh cnkgbm9kZXMgcGFzc2VkIHRvIGlycS1yaXNjdi1pbnRjCj4gPiA+ID4gZHJpdmVyIGluaXQgZnVu Y3Rpb24gYXMgaW5pdGlhbGl6ZWQgdG8gYmUgYWJsZSB0byBhY3QgYXMgY29ycmVjdAo+ID4gPiA+ IElSUSBwaGFuZGxlIG5vZGUuCj4gPiA+ID4KPiA+ID4gPiBTaWduZWQtb2ZmLWJ5OiBEbWl0cnkg RHVuYWV2IDxkdW5hZXZAdGVjb24ucnU+Cj4gPiA+ID4gLS0tCj4gPiA+ID4gIGRyaXZlcnMvaXJx Y2hpcC9pcnEtcmlzY3YtaW50Yy5jIHwgOCArKysrKystLQo+ID4gPiA+ICAxIGZpbGUgY2hhbmdl ZCwgNiBpbnNlcnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQo+ID4gPiA+Cj4gPiA+ID4gZGlmZiAt LWdpdCBhL2RyaXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtaW50Yy5jIGIvZHJpdmVycy9pcnFjaGlw L2lycS1yaXNjdi1pbnRjLmMKPiA+ID4gPiBpbmRleCA0YWRlZWUxYmMzOTEuLmMwMWE0ZThkNDk4 MyAxMDA2NDQKPiA+ID4gPiAtLS0gYS9kcml2ZXJzL2lycWNoaXAvaXJxLXJpc2N2LWludGMuYwo+ ID4gPiA+ICsrKyBiL2RyaXZlcnMvaXJxY2hpcC9pcnEtcmlzY3YtaW50Yy5jCj4gPiA+ID4gQEAg LTE1NSw4ICsxNTUsMTAgQEAgc3RhdGljIGludCBfX2luaXQgcmlzY3ZfaW50Y19pbml0KHN0cnVj dCBkZXZpY2Vfbm9kZSAqbm9kZSwKPiA+ID4gPiAgICAgICAgICAqIGZvciBlYWNoIElOVEMgRFQg bm9kZS4gV2Ugb25seSBuZWVkIHRvIGRvIElOVEMgaW5pdGlhbGl6YXRpb24KPiA+ID4gPiAgICAg ICAgICAqIGZvciB0aGUgSU5UQyBEVCBub2RlIGJlbG9uZ2luZyB0byBib290IENQVSAob3IgYm9v dCBIQVJUKS4KPiA+ID4gPiAgICAgICAgICAqLwo+ID4gPiA+IC0gICAgICAgaWYgKHJpc2N2X2hh cnRpZF90b19jcHVpZChoYXJ0aWQpICE9IHNtcF9wcm9jZXNzb3JfaWQoKSkKPiA+ID4gPiArICAg ICAgIGlmIChyaXNjdl9oYXJ0aWRfdG9fY3B1aWQoaGFydGlkKSAhPSBzbXBfcHJvY2Vzc29yX2lk KCkpIHsKPiA+ID4gPiArICAgICAgICAgICAgICAgZndub2RlX2Rldl9pbml0aWFsaXplZChvZl9u b2RlX3RvX2Z3bm9kZShub2RlKSwgdHJ1ZSk7Cj4gPiA+Cj4gPiA+IFRoZXJlIGlzIGFscmVhZHkg YSBwYXRjaCBvbiBMS01MIHRvIGFkZHJlc3MgdGhpcy4KPiA+ID4gaHR0cHM6Ly93d3cuc3Bpbmlj cy5uZXQvbGlzdHMva2VybmVsL21zZzQ5Mjk4ODYuaHRtbAo+ID4KPiA+IElmIHRoaXMgaXMgYSBm aXgsIHdoeSBpcyBpdCBidXJpZWQgaW4gYSBodWdlIHNlcmllcyBhbmQgbm90IGJyb3VnaHQKPiA+ IGZvcndhcmQgYXMgYW4gaW5kZXBlbmRlbnQgZml4IHRoYXQgbmVlZHMgdG8gYmUgcGlja2VkIGVh cmx5Pwo+IAo+IERtaXRyeSBzYXcgdGhpcyBpc3N1ZSBpbiBhIHRvdGFsbHkgZGlmZmVyZW50IGNv bnRleHQgd2hpY2ggaXMgbm90Cj4gcmVwcm9kdWNpYmxlIHdpdGggZXhpc3RpbmcgRFRTIGZpbGVz IGluIGtlcm5lbCBzb3VyY2VzLgoKSSBob3BlIHlvdSdyZSBub3Qgc3VnZ2VzdGluZyB0aGF0IG9u bHkgdGhlIERUcyB0aGF0IGFyZSBwcmVzZW50IGluIHRoZQprZXJuZWwgdHJlZSBhcmUgdmFsaWQu IEJlY2F1c2UgYXMgZmFyIGFzIEknbSBjb25jZXJuLCB0aGUgRFRzIGluIHRoZQprZXJuZWwgdHJl ZSBhcmUgb25seSBzb21lICpleGFtcGxlcyosIGFuZCBub3QgYSByZWZlcmVuY2UuCgpJIGZ1bGx5 IGV4cGVjdCB0aGUgdmFzdCBtYWpvcml0eSBvZiBEVHMgdG8gbGl2ZSAqb3V0c2lkZSogb2YgdGhl Cmtlcm5lbCB0cmVlLCBwcm92aWRlZCBieSB0aGUgZmlybXdhcmUsIGFuZCBuZXZlciB1cHN0cmVh bWVkLiBXb3VsZCB5b3UKZXhwZWN0IGV2ZXJ5IFBDIHZlbmRvciB0byB1cHN0cmVhbSB0aGVpciBB Q1BJIHRhYmxlcz8KCj4gVGhpcyBpc3N1ZSBvbmx5IG1hbmlmZXN0cyB3aGVuIHNvbWUgcGxhdGZv cm0gZHJpdmVyIERUIG5vZGUKPiBwb2ludHMgdG8gdGhlIHBlci1IQVJUIElOVEMgbm9kZXMuIEZv ciBleGFtcGxlLCBSSVNDLVYKPiBpcnFjaGlwIGRldmljZSBEVCBub2RlcyBwb2ludCB0byBwZXIt SEFSVCBJTlRDIG5vZGVzLgoKSXMgdGhpcyBjb25maWd1cmF0aW9uIGxlZ2FsIG9yIG5vdCBhcyBw ZXIgdGhlIERUIGJpbmRpbmc/IEkgZG9uJ3Qgc2VlCmFueXRoaW5nIHRoYXQgc3VnZ2VzdHMgaXQg aXNuJ3QgbGVnYWwsIGFuZCBoYXZpbmcgcGVyLUNQVSBpbnRlcnJ1cHRzCmlzbid0IGV4YWN0bHkg YSBuZXcgdGhpbmcuCgo+IEN1cnJlbnRseSwgYWxsIFJJU0MtViBpcnFjaGlwIGRyaXZlcnMgKElO VEMgYW5kIFBMSUMpIGFyZSBwcm9iZWQKPiBlYXJseSAobm90IGFzIHBsYXRmb3JtIGRyaXZlcnMp IHNvIHdlIGRvbid0IHNlZSB0aGlzIGlzc3VlIHdpdGgKPiBleGlzdGluZyBpcnFjaGlwIGRyaXZl cnMuCgpZb3UgZG9uJ3QsIGJ1dCBEaW1pdHJ5IGRvZXMuIFdobyB3aW5zPwoKCU0uCgotLSAKV2l0 aG91dCBkZXZpYXRpb24gZnJvbSB0aGUgbm9ybSwgcHJvZ3Jlc3MgaXMgbm90IHBvc3NpYmxlLgoK X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtcmlz Y3YgbWFpbGluZyBsaXN0CmxpbnV4LXJpc2N2QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xp c3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1yaXNjdgo= From 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d=kernel.org; s=k20201202; t=1696433570; bh=Na16UD/s1oSoqnUU7cLXvGvYgsS3in1QKmZWnqaLLM8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=UlRUnRxR4Knt/zA1ssgoCg17S7pcXjBahn655ReiBJ/eLOS5x/vT0cNWB+zftQ7/2 yWHdSS4rhR4Y0oYGHmClcdBh+rL5reJPF0yPyFNod0LOv7pAnVYN4KuKVm7jIfjyeQ pDpDvD5yer+ZQ4AejEO6htlgMPAmFHk/BTrXNKrjScnABeZAjuh+SwuMxa/eQ/YDnh gT476gABsmUxf1Wf8BNSuBOjsDQ77L2uJuzR8Xc1TeJjZyJxiR2K0gndCzA8ioimm5 DI9yGP7EjGgXIdZaqDV2kfk/tk5FuRuzef7jQVHgaXiIW6U60lPqTU96T6EOEikSvm mLjqOI8PHOVaA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qo3rk-0016Ui-GG; Wed, 04 Oct 2023 16:32:48 +0100 Date: Wed, 04 Oct 2023 16:32:47 +0100 Message-ID: <86cyxuo128.wl-maz@kernel.org> From: Marc Zyngier To: Anup Patel Cc: Dmitry Dunaev , dunaich@mail.ru, Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH] irqchip/riscv-intc: Mark INTC nodes for secondary CPUs as initialized. In-Reply-To: References: <20230926102801.1591126-1-dunaev@tecon.ru> <86il7mofmm.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: apatel@ventanamicro.com, dunaev@tecon.ru, dunaich@mail.ru, tglx@linutronix.de, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 04 Oct 2023 15:59:33 +0100, Anup Patel wrote: >=20 > On Wed, Oct 4, 2023 at 3:48=E2=80=AFPM Marc Zyngier wrot= e: > > > > On Tue, 26 Sep 2023 11:36:31 +0100, > > Anup Patel wrote: > > > > > > On Tue, Sep 26, 2023 at 3:59=E2=80=AFPM Dmitry Dunaev wrote: > > > > > > > > The current Linux driver irq-riscv-intc initialize IRQ domain only = once, > > > > when init function called on primary hart. In other cases no IRQ do= main is > > > > created and no operation on interrupt-controller node is performed. > > > > This is cause of that no common Linux driver can use per-cpu interr= upts > > > > mapped to several CPUs because fwnode of secondary cores INTC is not > > > > marked as initialized. This device is always will be marked as defe= rred. > > > > For example the system with devicetree > > > > > > > > cpu0: cpu@0 { > > > > cpu0_intc: interrupt-controller { > > > > interrupt-controller; > > > > compatible =3D riscv,cpu-intc; > > > > }; > > > > }; > > > > > > > > cpu1: cpu@1 { > > > > cpu1_intc: interrupt-controller { > > > > interrupt-controller; > > > > compatible =3D riscv,cpu-intc; > > > > }; > > > > }; > > > > > > > > buserr { > > > > compatible =3D riscv,buserr; > > > > interrupts-extended =3D <&cpu0_intc 16 &cpu1_intc 16>; > > > > }; > > > > > > > > will always report 'buserr' node as deferred without calling any > > > > bus probe function. > > > > > > > > This patch will mark all secondary nodes passed to irq-riscv-intc > > > > driver init function as initialized to be able to act as correct > > > > IRQ phandle node. > > > > > > > > Signed-off-by: Dmitry Dunaev > > > > --- > > > > drivers/irqchip/irq-riscv-intc.c | 8 ++++++-- > > > > 1 file changed, 6 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq= -riscv-intc.c > > > > index 4adeee1bc391..c01a4e8d4983 100644 > > > > --- a/drivers/irqchip/irq-riscv-intc.c > > > > +++ b/drivers/irqchip/irq-riscv-intc.c > > > > @@ -155,8 +155,10 @@ static int __init riscv_intc_init(struct devic= e_node *node, > > > > * for each INTC DT node. We only need to do INTC initializ= ation > > > > * for the INTC DT node belonging to boot CPU (or boot HART= ). > > > > */ > > > > - if (riscv_hartid_to_cpuid(hartid) !=3D smp_processor_id()) > > > > + if (riscv_hartid_to_cpuid(hartid) !=3D smp_processor_id()) { > > > > + fwnode_dev_initialized(of_node_to_fwnode(node), tru= e); > > > > > > There is already a patch on LKML to address this. > > > https://www.spinics.net/lists/kernel/msg4929886.html > > > > If this is a fix, why is it buried in a huge series and not brought > > forward as an independent fix that needs to be picked early? >=20 > Dmitry saw this issue in a totally different context which is not > reproducible with existing DTS files in kernel sources. I hope you're not suggesting that only the DTs that are present in the kernel tree are valid. Because as far as I'm concern, the DTs in the kernel tree are only some *examples*, and not a reference. I fully expect the vast majority of DTs to live *outside* of the kernel tree, provided by the firmware, and never upstreamed. Would you expect every PC vendor to upstream their ACPI tables? > This issue only manifests when some platform driver DT node > points to the per-HART INTC nodes. For example, RISC-V > irqchip device DT nodes point to per-HART INTC nodes. Is this configuration legal or not as per the DT binding? I don't see anything that suggests it isn't legal, and having per-CPU interrupts isn't exactly a new thing. > Currently, all RISC-V irqchip drivers (INTC and PLIC) are probed > early (not as platform drivers) so we don't see this issue with > existing irqchip drivers. You don't, but Dimitry does. Who wins? M. --=20 Without deviation from the norm, progress is not possible.