From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 413ED1C84B1 for ; Tue, 25 Feb 2025 11:19:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740482371; cv=none; b=OyGklxHLs5ExcC5NddT066irMuox+gvI8iZgCdXke/6zLiCe75J1koGhyZFN1oqjOShf481XeR9lb1rIFiQvcIdUSg7Ax0xdN6fxWsxAOmkq3Jkv2RQv8bjqnYHDvHsAlZsnP0nspeYRSzC09NnijJqoWfNbcnsYZQk1lt93u8c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740482371; c=relaxed/simple; bh=B3TgZBsAiBcZvqlhdb7CHczCunKDrMTsOuzpJdkxlX4=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=gysA6O/ojn7BoJiYZmX2NJerYGK47QwrHPSKTUr2sy7SFxE+9Gm/hy8+i2DH6f480sqksRVKNDerg9l4Kw+cXSsbMuOsSBJxl+QLjSOndJc8mCtDXHUNThNChKvdwP18Zw3whNXtTEwFfaPY25B9n+k/2TAM4V+HMTcTPNmk3CI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cdOLZHmb; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cdOLZHmb" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B6589C4CEE6; Tue, 25 Feb 2025 11:19:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1740482370; bh=B3TgZBsAiBcZvqlhdb7CHczCunKDrMTsOuzpJdkxlX4=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=cdOLZHmb73vW4OHMUKgoGadhjhUm/oZhHKHmluNY3AjG1wURkR6bdn53Q7fSNXh4N bXTB9fB1wpFfG+fMrYGQUZOXDlwEVujXruCwk9vTOMaA+vXBsmsU6swTNcdtQzOBmo AtO9WLBS4t+KZdyzoC8Jih2WtTcU8sfDpFZ245fa73a8jeASWpJiJIy3NjRtp1ZwJc PJBoSTxvHJoabfnx2UNxGytrZcvzhr3w+TUOzxBqiQKm8t6Fk3E1WP0JvK+s5dNJlN BLcPhYPO0hDOIjxEBzZ6V+pGWwZU+wOH06mHY1AiHGSOlA+941FEGMCJym933VKY6m H+yOitOv9X6OA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tmsyG-007jfi-GG; Tue, 25 Feb 2025 11:19:28 +0000 Date: Tue, 25 Feb 2025 11:19:28 +0000 Message-ID: <86frk2qnjz.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, Joey Gouly , Suzuki K Poulose , Sebastian Ott Subject: Re: [PATCH v4 4/5] KVM: arm64: Allow userspace to change the implementation ID registers In-Reply-To: <20250225005401.679536-5-oliver.upton@linux.dev> References: <20250225005401.679536-1-oliver.upton@linux.dev> <20250225005401.679536-5-oliver.upton@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, sebott@redhat.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 25 Feb 2025 00:54:00 +0000, Oliver Upton wrote: > > From: Sebastian Ott > > KVM's treatment of the ID registers that describe the implementation > (MIDR, REVIDR, and AIDR) is interesting, to say the least. On the > userspace-facing end of it, KVM presents the values of the boot CPU on > all vCPUs and treats them as invariant. On the guest side of things KVM > presents the hardware values of the local CPU, which can change during > CPU migration in a big-little system. > > While one may call this fragile, there is at least some degree of > predictability around it. For example, if a VMM wanted to present > big-little to a guest, it could affine vCPUs accordingly to the correct > clusters. > > All of this makes a giant mess out of adding support for making these > implementation ID registers writable. Avoid breaking the rather subtle > ABI around the old way of doing things by requiring opt-in from > userspace to make the registers writable. > > When the cap is enabled, allow userspace to set MIDR, REVIDR, and AIDR > to any non-reserved value and present those values consistently across > all vCPUs. > > Signed-off-by: Sebastian Ott > [oliver: changelog, capability] > Signed-off-by: Oliver Upton > --- > Documentation/virt/kvm/api.rst | 18 +++++++++ > arch/arm64/include/asm/kvm_host.h | 2 + > arch/arm64/kvm/arm.c | 9 +++++ > arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 8 +++- > arch/arm64/kvm/sys_regs.c | 45 +++++++++++++++++++--- > include/uapi/linux/kvm.h | 1 + > 6 files changed, 77 insertions(+), 6 deletions(-) > [...] > @@ -2620,9 +2655,9 @@ static const struct sys_reg_desc sys_reg_descs[] = { > > { SYS_DESC(SYS_DBGVCR32_EL2), undef_access, reset_val, DBGVCR32_EL2, 0 }, > > - IMPLEMENTATION_ID(MIDR_EL1), > + IMPLEMENTATION_ID(MIDR_EL1, GENMASK_ULL(31, 0)), > { SYS_DESC(SYS_MPIDR_EL1), NULL, reset_mpidr, MPIDR_EL1 }, > - IMPLEMENTATION_ID(REVIDR_EL1), > + IMPLEMENTATION_ID(REVIDR_EL1, -1), nit: using GENMASK_ULL() would be much nicer. > > /* > * ID regs: all ID_SANITISED() entries here must have corresponding > @@ -2894,7 +2929,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { > .set_user = set_clidr, .val = ~CLIDR_EL1_RES0 }, > { SYS_DESC(SYS_CCSIDR2_EL1), undef_access }, > { SYS_DESC(SYS_SMIDR_EL1), undef_access }, > - IMPLEMENTATION_ID(AIDR_EL1), > + IMPLEMENTATION_ID(AIDR_EL1, -1), Same thing here. Thanks, M. -- Without deviation from the norm, progress is not possible.