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From: Torbjorn Granlund <tg@gmplib.org>
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Date: Tue, 07 May 2013 17:58:45 +0200
In-Reply-To: <86a9o7qe3u.fsf_-_@shell.gmplib.org> (Torbjorn Granlund's message
	of "Tue\, 07 May 2013 12\:27\:33 +0200")
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Subject: Re: [Qemu-devel] Incorrect handling of more PPC64 insns (PATCH)
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To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org

OK, so took to reading some of translate to see how well it agrees with
the PPC architecture definition.

I spotted a bug with cmp, which was repeated 4 times.  Somebody decided
that NARROW_MODE should affect the handling of cmp instructions, which
is contrary to the ISA documentation.

The first hunk is just a comment about suspicious code.  I don't suggest
to apply that.

Incidentally, this patch makes GMP testing go a bit further, and the
testcase bug-qemu-ppc-again.s works correctly.

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 1a84653..c44b96d 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -665,6 +665,7 @@ static inline void gen_op_cmpi32(TCGv arg0, target_ulon=
g arg1, int s, int crf)
=20
 static inline void gen_set_Rc0(DisasContext *ctx, TCGv reg)
 {
+// suspicious code -- tege
     if (NARROW_MODE(ctx)) {
         gen_op_cmpi32(reg, 0, 1, 0);
     } else {
@@ -675,7 +676,7 @@ static inline void gen_set_Rc0(DisasContext *ctx, TCGv =
reg)
 /* cmp */
 static void gen_cmp(DisasContext *ctx)
 {
-    if (NARROW_MODE(ctx) || !(ctx->opcode & 0x00200000)) {
+    if (!(ctx->opcode & 0x00200000)) {
         gen_op_cmp32(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)],
                      1, crfD(ctx->opcode));
     } else {
@@ -687,7 +688,7 @@ static void gen_cmp(DisasContext *ctx)
 /* cmpi */
 static void gen_cmpi(DisasContext *ctx)
 {
-    if (NARROW_MODE(ctx) || !(ctx->opcode & 0x00200000)) {
+    if (!(ctx->opcode & 0x00200000)) {
         gen_op_cmpi32(cpu_gpr[rA(ctx->opcode)], SIMM(ctx->opcode),
                       1, crfD(ctx->opcode));
     } else {
@@ -699,7 +700,7 @@ static void gen_cmpi(DisasContext *ctx)
 /* cmpl */
 static void gen_cmpl(DisasContext *ctx)
 {
-    if (NARROW_MODE(ctx) || !(ctx->opcode & 0x00200000)) {
+    if (!(ctx->opcode & 0x00200000)) {
         gen_op_cmp32(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)],
                      0, crfD(ctx->opcode));
     } else {
@@ -711,7 +712,7 @@ static void gen_cmpl(DisasContext *ctx)
 /* cmpli */
 static void gen_cmpli(DisasContext *ctx)
 {
-    if (NARROW_MODE(ctx) || !(ctx->opcode & 0x00200000)) {
+    if (!(ctx->opcode & 0x00200000)) {
         gen_op_cmpi32(cpu_gpr[rA(ctx->opcode)], UIMM(ctx->opcode),
                       0, crfD(ctx->opcode));
     } else {

--=20
Torbj=C3=B6rn