From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8555143B3E4; Wed, 22 Jul 2026 09:11:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784711475; cv=none; b=PAlu5capWx04GtETit/cUhZd6rPspSrZqQUJn5H5wRn+IR7YfWIVzgyCm3tDz9xQMV9IRf6dKWpd36UZadS3J7OlqN/vHEpZte9ttATUzoMvxjybIJ0Iuy1hK92ck3otQ9Pf6SlBZtty2Y1RiaRmTeAzSfO37RQKGg41H2P13CM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784711475; c=relaxed/simple; bh=AvUMNj99F5T1FZu9pmmZ3YfSZ7H8GSRMQ26im/gxltg=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=HykrS2kojUSmRTWCGXt4zZ7qw4xE3kSu2AMQGnIuRZplkpVgi3Y3TKBBv7IGGzKfgBwkzPfOYeX9AJw68b6C3MuCDFz7bfEYybZXE0CHCR21sl3Rygo2sk0ht3UIpFMJdmE0fMjyE3M9J+moFvEAqz2z0cQmWslbjSM+y2TGz7M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YpgzXfTJ; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YpgzXfTJ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 337581F00A3A; Wed, 22 Jul 2026 09:11:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784711474; bh=2S3TfhB9cIYevuw2glVwaSELRyzkS0UTsDLeUSSyZRk=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=YpgzXfTJU48f9mjMsovdgKqbyYrP57JLh92NI4hscq8fPOWc8RACb6DnEgMCdG2K1 IaAeJg4AOTum64VXVRU4rEv1NgByjyaRgxt8BcGa2yLhzckLkhdD9DnqOEV94ICqwG rCYnbaTavcmtakmHOiQqHGJSjomvDg2WAlJm1AFsv/cuVVlqPbifFRlXj42sehnPY/ gPMvdbs1Sz2eyvEQZl4i+Re7yEr5vQU3dZtQvgXSdqrPRt9ysDnBULAYeBVJ6EbpKH 43uNUr7mR9coWsZTKYVKNJ2XMsyu0oboO2geIqIStGrI6z7zFwAbC8+O+2+yA01B8I 11Vs4HQZ16Nnw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wmSyt-00000007YI9-3xcb; Wed, 22 Jul 2026 09:11:12 +0000 Date: Wed, 22 Jul 2026 10:11:11 +0100 Message-ID: <86h5lre6ds.wl-maz@kernel.org> From: Marc Zyngier To: sashiko-reviews@lists.linux.dev Cc: "Oliver Upton" , kvmarm@lists.linux.dev, kvm@vger.kernel.org Subject: Re: [PATCH v3 20/28] KVM: arm64: Add sanitisation for NVHCR_EL2 In-Reply-To: <20260722083803.C0BD11F000E9@smtp.kernel.org> References: <20260722074234.3330999-1-maz@kernel.org> <20260722074234.3330999-21-maz@kernel.org> <20260722083803.C0BD11F000E9@smtp.kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: sashiko-reviews@lists.linux.dev, oupton@kernel.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 22 Jul 2026 09:38:03 +0100, sashiko-bot@kernel.org wrote: > > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: > > Pre-existing issues: > - [High] Subsystem rule violation: Numeric range loop over sparse `enum vcpu_sysreg` > -- > > --- Patch [20]: [PATCH v3 20/28] KVM: arm64: Add sanitisation for NVHCR_EL2 --- > commit b143c0689f4a9db3345ab50e6a712d0698ebaa75 > Author: Marc Zyngier > > KVM: arm64: Add sanitisation for NVHCR_EL2 > > This commit adds sanitisation support for the NVHCR_EL2 register. > It mimics the format of HCR_EL2 but conditionally depends on FEAT_NV3 > being present. If FEAT_NV3 is absent, it relies on standard VNCR data > transfers. > > [ ... ] > > > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c > > index 82be8bcb07035..34e63480886cd 100644 > > --- a/arch/arm64/kvm/nested.c > > +++ b/arch/arm64/kvm/nested.c > > @@ -1828,6 +1828,10 @@ int kvm_init_nv_sysregs(struct kvm_vcpu *vcpu) > > resx = get_reg_fixed_bits(kvm, HCR_EL2); > > set_sysreg_masks(kvm, HCR_EL2, resx); > > > > + /* NVHCR_EL2 */ > > + resx = get_reg_fixed_bits(kvm, NVHCR_EL2); > > + set_sysreg_masks(kvm, NVHCR_EL2, resx); > > + > > /* HCRX_EL2 */ > > resx = get_reg_fixed_bits(kvm, HCRX_EL2); > > set_sysreg_masks(kvm, HCRX_EL2, resx); > > [Severity: High] > This is a pre-existing issue, but later in kvm_init_nv_sysregs() there is > a loop over enum vcpu_sysreg: > > for (enum vcpu_sysreg sr = __SANITISED_REG_START__; sr < NR_SYS_REGS; sr++) > __vcpu_rmw_sys_reg(vcpu, sr, |=, 0); > > Does this numeric range loop iterate over unintended registers? > > The KVM ARM64 subsystem guidelines state that enum vcpu_sysreg is sparsely > numbered by VNCR byte offsets. Using a < comparison and incrementing over a > numeric range touches register indices that happen to fall within the byte > span. > > Could this silently drop or corrupt guest state by applying operations to > unrelated registers? These are unallocated VNCR entries. we can do whatever we want with them, including scribbling Pi to the nth digit if there is enough space. M. -- Without deviation from the norm, progress is not possible.