From: Marc Zyngier <maz@kernel.org>
To: Mostafa Saleh <smostafa@google.com>
Cc: linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
linux-arm-kernel@lists.infradead.org, oupton@kernel.org,
seiden@linux.ibm.com, joey.gouly@arm.com, suzuki.poulose@arm.com,
yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org,
vdonnefort@google.com, tabba@google.com, sebastianene@google.com,
keirf@google.com
Subject: Re: [PATCH v3] KVM: arm64: Optimize protected mode with FWB and DIC
Date: Thu, 30 Jul 2026 13:39:58 +0100 [thread overview]
Message-ID: <86ik5wd529.wl-maz@kernel.org> (raw)
In-Reply-To: <20260723162002.3848054-1-smostafa@google.com>
On Thu, 23 Jul 2026 17:20:02 +0100,
Mostafa Saleh <smostafa@google.com> wrote:
>
> KVM opportunistically enables FWB if supported by the system for guest
> VMs, which allows it to elude cache maintenance for data as they are
> forced to be cacheable from stage-2.
> In that case, __clean_dcache_guest_page() will immediately return.
> However in protected mode, before calling __clean_dcache_guest_page()
> it loops over the range and fix_map/unmap it, issuing TLB
> invalidations, dsb() and isb() unnecessarily.
>
> This can be optimized by returning early if FWB is supported,
> kvm_pgtable_stage2_map() already issues dsb() and tlb invalidation
> functions issue dsb() for the unmap path.
>
> Similarly for DIC, we can omit the call in
> invalidate_icache_guest_page()
>
> No isb() needed as ERET is context synchronization event.
>
> Signed-off-by: Mostafa Saleh <smostafa@google.com>
Acked-by: Marc Zyngier <maz@kernel.org>
M.
--
Without deviation from the norm, progress is not possible.
prev parent reply other threads:[~2026-07-30 12:40 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-23 16:20 [PATCH v3] KVM: arm64: Optimize protected mode with FWB and DIC Mostafa Saleh
2026-07-23 16:29 ` Fuad Tabba
2026-07-30 12:39 ` Marc Zyngier [this message]
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