From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Subject: Re: [RFC PATCH v6 04/20] iommu/arm-smmu: add capability IOMMU_CAP_INTR_REMAP Date: Sat, 28 Jun 2014 08:05:28 +0100 Message-ID: <86ionl4ipz.fsf@arm.com> References: <20140616151329.GQ16758@arm.com> <20140616152157.GB31771@8bytes.org> <20140616152526.GR16758@arm.com> <20140616153832.GC31771@8bytes.org> <9353770066894e85809e1e443b71d1cd@BY2PR07MB203.namprd07.prod.outlook.com> <748dccbbd3284521af4659ccbbb11453@BY2PR07MB203.namprd07.prod.outlook.com> <1403809223.31091.137.camel@ul30vt.home> <1403811384.31091.151.camel@ul30vt.home> <20140627084722.GB26276@arm.com> <2645e3a22f5e4ae9994c0ee8fa327cb4@BY2PR07MB203.namprd07.prod.outlook.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <2645e3a22f5e4ae9994c0ee8fa327cb4-Rl8gF8DaO8QN+Mk3fGG+YBQPvRvOrrxkXA4E9RH9d+qIuWR1G4zioA@public.gmane.org> (Tirumalesh Chalamarla's message of "Fri, 27 Jun 2014 22:57:28 +0100") List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: "Chalamarla, Tirumalesh" Cc: "kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Will Deacon , "stuart.yoder-KZfg59tc24xl57MIdRCFDg@public.gmane.org" , "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" , open list , "tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org" , "kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg@public.gmane.org" , "moderated list:ARM SMMU DRIVER" List-Id: iommu@lists.linux-foundation.org T24gRnJpLCBKdW4gMjcgMjAxNCBhdCAxMDo1NzoyOCBQTSwgIkNoYWxhbWFybGEsIFRpcnVtYWxl c2giIDxUaXJ1bWFsZXNoLkNoYWxhbWFybGFAY2F2aXVtbmV0d29ya3MuY29tPiB3cm90ZToKPiBN YXJjLAo+Cj4gICAgICAgICAgV2hhdCBpcyB5b3VyIG9waW5pb24gb24gSVRTIGVtdWxhdGlvbiAu IGlzIGl0IHNob3VsZCBiZSBwYXJ0Cj4gICAgICAgICAgb2YgS1ZNIG9yIFZGSU8uCgpNYWtpbmcg YW55IHNvcnQgb2YgZW11bGF0aW9uIHBhcnQgb2YgVkZJTyBzb3VuZHMgcXVpdGUgd3JvbmcuIFRo YXQncyBub3QKd2hhdCBWRklPIGlzIGFib3V0LCBhdCBhbGwuIEVtdWxhdGlvbiBiZWxvbmdzIHRv IHRoZSBoeXBlcnZpc29yLCBhbmQKbm93aGVyZSBlbHNlLgoKPiAgICAgICAgIEFsc28gdGhpcyBj b2RlIG5lZWRzIHRvIGRlcGVuZCBvbiBJVFMgaG9zdCBkcml2ZXIgYSBsb3QsIEhvc3QKPiAgICAg ICAgIElUUyBkcml2ZXIgbmVlZHMgdG8gaGF2ZSBhbiBpbnRlcmZhY2UgZm9yIHRoaXMgY29kZSB0 byB1c2UuCgpZb3UgY2FuIHNoYXJlIHRoZSBjb21tYW5kIGludGVyZmFjZSBhcyBzb21lIGZvcm0g b2YgbGlicmFyeSwgYnV0IHRoYXQncwphYm91dCBpdC4gVGhlcmUgaXMgbm8gbW9yZSByZWxhdGlv bnNoaXAgYmV0d2VlbiB0aGUgSVRTIGRyaXZlciBhbmQgdGhlCklUUyBlbXVsYXRpb24gYXMgdGhl cmUgaXMgYmV0d2VlbiB0aGUgR0lDIGRyaXZlciBhbmQgaXRzIGVtdWxhdGlvbgpjb3VudGVycGFy dC4KCglNLgoKCj4gVGhhbmtzLAo+ICBUaXJ1bWFsZXNoCj4gICAgICAKPiAtLS0tLU9yaWdpbmFs IE1lc3NhZ2UtLS0tLQo+IEZyb206IFdpbGwgRGVhY29uIFttYWlsdG86d2lsbC5kZWFjb25AYXJt LmNvbV0gCj4gU2VudDogRnJpZGF5LCBKdW5lIDI3LCAyMDE0IDE6NDcgQU0KPiBUbzogQWxleCBX aWxsaWFtc29uCj4gQ2M6IENoYWxhbWFybGEsIFRpcnVtYWxlc2g7IEpvZXJnIFJvZWRlbDsga3Zt QHZnZXIua2VybmVsLm9yZzsgb3BlbiBsaXN0OyBzdHVhcnQueW9kZXJAZnJlZXNjYWxlLmNvbTsg aW9tbXVAbGlzdHMubGludXgtZm91bmRhdGlvbi5vcmc7IHRlY2hAdmlydHVhbG9wZW5zeXN0ZW1z LmNvbTsga3ZtYXJtQGxpc3RzLmNzLmNvbHVtYmlhLmVkdTsgbW9kZXJhdGVkIGxpc3Q6QVJNIFNN TVUgRFJJVkVSOyBtYXJjLnp5bmdpZXJAYXJtLmNvbQo+IFN1YmplY3Q6IFJlOiBbUkZDIFBBVENI IHY2IDA0LzIwXSBpb21tdS9hcm0tc21tdTogYWRkIGNhcGFiaWxpdHkgSU9NTVVfQ0FQX0lOVFJf UkVNQVAKPgo+IE9uIFRodSwgSnVuIDI2LCAyMDE0IGF0IDA4OjM2OjI0UE0gKzAxMDAsIEFsZXgg V2lsbGlhbXNvbiB3cm90ZToKPj4gT24gVGh1LCAyMDE0LTA2LTI2IGF0IDE5OjEwICswMDAwLCBD aGFsYW1hcmxhLCBUaXJ1bWFsZXNoIHdyb3RlOgo+PiA+IFRoYW5rcyBmb3IgdGhlIGNsYXJpZmlj YXRpb24gQWxleCwgVGhhdOKAmXMgZXhhY3RseSBteSBwb2ludCwgd2h5IGFyZSAKPj4gPiB3ZSBy ZWx5aW5nIG9uICBRRU1VIG9yIHNvbWV0aGluZyBlbHNlIHRvIGVtdWxhdGUgdGhlIE1TSSBzcGFj ZSB3aGVuIAo+PiA+IHdlIGNhbiBkaXJlY3RseSBnaXZlIGFjY2VzcyB0byBkZXZpY2VzIHVzaW5n IElUUyAob2YgY291cnNlIHdpdGggYSAKPj4gPiBzbWFsbCBlbXVsYXRpb24gY29kZSkuICBUaGlz IHdheSB3ZSBhcmUgYWxzbyBiZW5lZml0ZWQgZnJvbSBhbGwgSVRTIAo+PiA+IHNlcnZpY2VzIGxp a2UgVkNQVSBtaWdyYXRpb24gZXRjLgo+PiAKPj4gSSBoYXZlIG5vIGlkZWEgd2hhdCBJVFMgaXMu Cj4KPiBJVFMgaXMgdGhlIE1TSSBkb29yYmVsbCBmb3IgR0lDdjMgKEFSTSdzIGxhdGVzdCBpbnRl cnJ1cHQgY29udHJvbGxlcikuCj4KPiBJIGFncmVlIHRoYXQgd2Ugd2lsbCBuZWVkIGFuIElUUyBl bXVsYXRpb24gaWYgd2Ugd2FudCB0byB1c2UgTVNJcyBpbgo+PiB0aGUgZ3Vlc3QsIGFuZCBJIGJl bGlldmUgdGhhdCBNYXJjIChDQydkKSBoYWQgYWxyZWFkeSBzdGFydGVkCj4+IHRoaW5raW5nIGFi b3V0IHRoYXQuCj4KPgo+PiA+IFdoYXQgYWJvdXQgbm9uIFFFTVUgVkZJTyB1c2VycywgZm9yIGV4 YW1wbGUsIGlmIEkgd2FudGVkIHRvIHVzZSBWRklPIHRvCj4+ID4gYXNzaWduIGEgZGV2aWNlIHRv IGEgdXNlciBwcm9jZXNzIEkgZG9uJ3QgbmVlZCB0byBkZXBlbmQgb24gUUVNVS4gICBJCj4+ID4g dGhvdWdodCB0aGlzIGlzIG9uZSBvZiB0aGUgbWFpbiBnb2FscyBvZiB2ZmlvIHRvIG1ha2UgaXQg aW5kZXBlbmRlbnQgb2YKPj4gPiBoeXBlcnZpc29ycy4gICAgIAo+PiAKPj4gV2hlcmUgZGlkIFFF TVUgYmVjb21lIGEgcmVxdWlyZW1lbnQ/ICBNYXliZSBJJ20gbWlzc2luZyBzb21ldGhpbmcgaW4g Cj4+IHRoZSBBUk0gcGFydCBvZiB0aGUgY29udmVyc2F0aW9uIHRoYXQgZ290IGNob3BwZWQgb2Zm LCBidXQgdGhpcyBpcyAKPj4gZXhhY3RseSB3aHkgd2UgaGF2ZSB0aGUgVkZJTy9RRU1VIHNwbGl0 IHRoYXQgd2UgZG8uICBWRklPIHByb3ZpZGVzIAo+PiBiYXNpYyB2aXJ0dWFsaXphdGlvbiBmb3Ig Y29uZmlnIHNwYWNlIGFuZCByZXN0cmljdHMgYWNjZXNzIHRvIG90aGVyIAo+PiBhcmVhcyB0aGF0 IHVzZXJzIHNob3VsZG4ndCBiZSBhbGxvd2VkIHRvIGNoYW5nZS4gIFFFTVUgaXMganVzdCBvbmUg Cj4+IGV4YW1wbGUgb2YgYSB1c2Vyc3BhY2UgVkZJTyBkcml2ZXIuICBRRU1VIHRha2VzIHRoZSBk ZWNvbXBvc2VkIGRldmljZSAKPj4gZXhwb3NlZCB0aHJvdWdoIHRoZSBWRklPIEFCSSBhbmQgcmUt Y3JlYXRlcyBhIFBDSSBkZXZpY2Ugb3V0IG9mIGl0LiAgCj4+IFZGSU8gaXRzZWxmIGhhcyBubyBk ZXBlbmRlbmN5IG9uIFFFTVUuICBUaGFua3MsCj4KPiBJIGFsc28gZG9uJ3QgdW5kZXJzdGFuZCB0 aGUgUUVNVSBwYXJ0IGhlcmUuIFRoZSBNU0kgZW11bGF0aW9uIHdvdWxkIGJlCj4+IGluIHRoZSBr ZXJuZWwsIGp1c3QgbGlrZSB0aGUgR0lDdjIgZW11bGF0aW9uIHRoYXQgd2UgYWxyZWFkeQo+PiBo YXZlLiBGb3IgdXNlcnNwYWNlIGRyaXZlcnMsIHdvdWxkbid0IHlvdSBqdXN0IHVzZSBldmVudGZk IHJhdGhlcgo+PiB0aGFuIGJvdGhlciB3aXRoIGVtdWxhdGluZyBNU0lzPwo+Cj4gRmluYWxseSwg dGhlIGludGVycnVwdCByZW1hcHBpbmcgcGFydCBpcyBhYm91dCB0aGUgU01NVSBwcmV2ZW50aW5n IE1TSQo+PiB3cml0ZXMgdG8gYXJiaXRyYXJ5IHBvcnRpb25zIG9mIHRoZSBob3N0IGFkZHJlc3Mg c3BhY2UuIFRoZSBJVFMgaXMKPj4gYWJvdXQgcm91dGluZyBpbnRlcnJ1cHRzIHRvIENQVXMuCj4K PiBXaWxsCgotLSAKSmF6eiBpcyBub3QgZGVhZC4gSXQganVzdCBzbWVsbHMgZnVubnkuCl9fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmlvbW11IG1haWxpbmcg bGlzdAppb21tdUBsaXN0cy5saW51eC1mb3VuZGF0aW9uLm9yZwpodHRwczovL2xpc3RzLmxpbnV4 Zm91bmRhdGlvbi5vcmcvbWFpbG1hbi9saXN0aW5mby9pb21tdQ== From mboxrd@z Thu Jan 1 00:00:00 1970 From: marc.zyngier@arm.com (Marc Zyngier) Date: Sat, 28 Jun 2014 08:05:28 +0100 Subject: [RFC PATCH v6 04/20] iommu/arm-smmu: add capability IOMMU_CAP_INTR_REMAP In-Reply-To: <2645e3a22f5e4ae9994c0ee8fa327cb4@BY2PR07MB203.namprd07.prod.outlook.com> (Tirumalesh Chalamarla's message of "Fri, 27 Jun 2014 22:57:28 +0100") References: <20140616151329.GQ16758@arm.com> <20140616152157.GB31771@8bytes.org> <20140616152526.GR16758@arm.com> <20140616153832.GC31771@8bytes.org> <9353770066894e85809e1e443b71d1cd@BY2PR07MB203.namprd07.prod.outlook.com> <748dccbbd3284521af4659ccbbb11453@BY2PR07MB203.namprd07.prod.outlook.com> <1403809223.31091.137.camel@ul30vt.home> <1403811384.31091.151.camel@ul30vt.home> <20140627084722.GB26276@arm.com> <2645e3a22f5e4ae9994c0ee8fa327cb4@BY2PR07MB203.namprd07.prod.outlook.com> Message-ID: <86ionl4ipz.fsf@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Jun 27 2014 at 10:57:28 PM, "Chalamarla, Tirumalesh" wrote: > Marc, > > What is your opinion on ITS emulation . is it should be part > of KVM or VFIO. Making any sort of emulation part of VFIO sounds quite wrong. That's not what VFIO is about, at all. Emulation belongs to the hypervisor, and nowhere else. > Also this code needs to depend on ITS host driver a lot, Host > ITS driver needs to have an interface for this code to use. You can share the command interface as some form of library, but that's about it. There is no more relationship between the ITS driver and the ITS emulation as there is between the GIC driver and its emulation counterpart. M. > Thanks, > Tirumalesh > > -----Original Message----- > From: Will Deacon [mailto:will.deacon at arm.com] > Sent: Friday, June 27, 2014 1:47 AM > To: Alex Williamson > Cc: Chalamarla, Tirumalesh; Joerg Roedel; kvm at vger.kernel.org; open list; stuart.yoder at freescale.com; iommu at lists.linux-foundation.org; tech at virtualopensystems.com; kvmarm at lists.cs.columbia.edu; moderated list:ARM SMMU DRIVER; marc.zyngier at arm.com > Subject: Re: [RFC PATCH v6 04/20] iommu/arm-smmu: add capability IOMMU_CAP_INTR_REMAP > > On Thu, Jun 26, 2014 at 08:36:24PM +0100, Alex Williamson wrote: >> On Thu, 2014-06-26 at 19:10 +0000, Chalamarla, Tirumalesh wrote: >> > Thanks for the clarification Alex, That?s exactly my point, why are >> > we relying on QEMU or something else to emulate the MSI space when >> > we can directly give access to devices using ITS (of course with a >> > small emulation code). This way we are also benefited from all ITS >> > services like VCPU migration etc. >> >> I have no idea what ITS is. > > ITS is the MSI doorbell for GICv3 (ARM's latest interrupt controller). > > I agree that we will need an ITS emulation if we want to use MSIs in >> the guest, and I believe that Marc (CC'd) had already started >> thinking about that. > > >> > What about non QEMU VFIO users, for example, if I wanted to use VFIO to >> > assign a device to a user process I don't need to depend on QEMU. I >> > thought this is one of the main goals of vfio to make it independent of >> > hypervisors. >> >> Where did QEMU become a requirement? Maybe I'm missing something in >> the ARM part of the conversation that got chopped off, but this is >> exactly why we have the VFIO/QEMU split that we do. VFIO provides >> basic virtualization for config space and restricts access to other >> areas that users shouldn't be allowed to change. QEMU is just one >> example of a userspace VFIO driver. QEMU takes the decomposed device >> exposed through the VFIO ABI and re-creates a PCI device out of it. >> VFIO itself has no dependency on QEMU. Thanks, > > I also don't understand the QEMU part here. The MSI emulation would be >> in the kernel, just like the GICv2 emulation that we already >> have. For userspace drivers, wouldn't you just use eventfd rather >> than bother with emulating MSIs? > > Finally, the interrupt remapping part is about the SMMU preventing MSI >> writes to arbitrary portions of the host address space. The ITS is >> about routing interrupts to CPUs. > > Will -- Jazz is not dead. It just smells funny. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Subject: Re: [RFC PATCH v6 04/20] iommu/arm-smmu: add capability IOMMU_CAP_INTR_REMAP Date: Sat, 28 Jun 2014 08:05:28 +0100 Message-ID: <86ionl4ipz.fsf@arm.com> References: <20140616151329.GQ16758@arm.com> <20140616152157.GB31771@8bytes.org> <20140616152526.GR16758@arm.com> <20140616153832.GC31771@8bytes.org> <9353770066894e85809e1e443b71d1cd@BY2PR07MB203.namprd07.prod.outlook.com> <748dccbbd3284521af4659ccbbb11453@BY2PR07MB203.namprd07.prod.outlook.com> <1403809223.31091.137.camel@ul30vt.home> <1403811384.31091.151.camel@ul30vt.home> <20140627084722.GB26276@arm.com> <2645e3a22f5e4ae9994c0ee8fa327cb4@BY2PR07MB203.namprd07.prod.outlook.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Cc: "kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Will Deacon , "stuart.yoder-KZfg59tc24xl57MIdRCFDg@public.gmane.org" , "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" , open list , "tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org" , "kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg@public.gmane.org" , "moderated list:ARM SMMU DRIVER" To: "Chalamarla\, Tirumalesh" Return-path: In-Reply-To: <2645e3a22f5e4ae9994c0ee8fa327cb4-Rl8gF8DaO8QN+Mk3fGG+YBQPvRvOrrxkXA4E9RH9d+qIuWR1G4zioA@public.gmane.org> (Tirumalesh Chalamarla's message of "Fri, 27 Jun 2014 22:57:28 +0100") List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org List-Id: kvm.vger.kernel.org T24gRnJpLCBKdW4gMjcgMjAxNCBhdCAxMDo1NzoyOCBQTSwgIkNoYWxhbWFybGEsIFRpcnVtYWxl c2giIDxUaXJ1bWFsZXNoLkNoYWxhbWFybGFAY2F2aXVtbmV0d29ya3MuY29tPiB3cm90ZToKPiBN YXJjLAo+Cj4gICAgICAgICAgV2hhdCBpcyB5b3VyIG9waW5pb24gb24gSVRTIGVtdWxhdGlvbiAu IGlzIGl0IHNob3VsZCBiZSBwYXJ0Cj4gICAgICAgICAgb2YgS1ZNIG9yIFZGSU8uCgpNYWtpbmcg YW55IHNvcnQgb2YgZW11bGF0aW9uIHBhcnQgb2YgVkZJTyBzb3VuZHMgcXVpdGUgd3JvbmcuIFRo YXQncyBub3QKd2hhdCBWRklPIGlzIGFib3V0LCBhdCBhbGwuIEVtdWxhdGlvbiBiZWxvbmdzIHRv IHRoZSBoeXBlcnZpc29yLCBhbmQKbm93aGVyZSBlbHNlLgoKPiAgICAgICAgIEFsc28gdGhpcyBj b2RlIG5lZWRzIHRvIGRlcGVuZCBvbiBJVFMgaG9zdCBkcml2ZXIgYSBsb3QsIEhvc3QKPiAgICAg ICAgIElUUyBkcml2ZXIgbmVlZHMgdG8gaGF2ZSBhbiBpbnRlcmZhY2UgZm9yIHRoaXMgY29kZSB0 byB1c2UuCgpZb3UgY2FuIHNoYXJlIHRoZSBjb21tYW5kIGludGVyZmFjZSBhcyBzb21lIGZvcm0g b2YgbGlicmFyeSwgYnV0IHRoYXQncwphYm91dCBpdC4gVGhlcmUgaXMgbm8gbW9yZSByZWxhdGlv bnNoaXAgYmV0d2VlbiB0aGUgSVRTIGRyaXZlciBhbmQgdGhlCklUUyBlbXVsYXRpb24gYXMgdGhl cmUgaXMgYmV0d2VlbiB0aGUgR0lDIGRyaXZlciBhbmQgaXRzIGVtdWxhdGlvbgpjb3VudGVycGFy dC4KCglNLgoKCj4gVGhhbmtzLAo+ICBUaXJ1bWFsZXNoCj4gICAgICAKPiAtLS0tLU9yaWdpbmFs IE1lc3NhZ2UtLS0tLQo+IEZyb206IFdpbGwgRGVhY29uIFttYWlsdG86d2lsbC5kZWFjb25AYXJt LmNvbV0gCj4gU2VudDogRnJpZGF5LCBKdW5lIDI3LCAyMDE0IDE6NDcgQU0KPiBUbzogQWxleCBX aWxsaWFtc29uCj4gQ2M6IENoYWxhbWFybGEsIFRpcnVtYWxlc2g7IEpvZXJnIFJvZWRlbDsga3Zt QHZnZXIua2VybmVsLm9yZzsgb3BlbiBsaXN0OyBzdHVhcnQueW9kZXJAZnJlZXNjYWxlLmNvbTsg aW9tbXVAbGlzdHMubGludXgtZm91bmRhdGlvbi5vcmc7IHRlY2hAdmlydHVhbG9wZW5zeXN0ZW1z LmNvbTsga3ZtYXJtQGxpc3RzLmNzLmNvbHVtYmlhLmVkdTsgbW9kZXJhdGVkIGxpc3Q6QVJNIFNN TVUgRFJJVkVSOyBtYXJjLnp5bmdpZXJAYXJtLmNvbQo+IFN1YmplY3Q6IFJlOiBbUkZDIFBBVENI IHY2IDA0LzIwXSBpb21tdS9hcm0tc21tdTogYWRkIGNhcGFiaWxpdHkgSU9NTVVfQ0FQX0lOVFJf UkVNQVAKPgo+IE9uIFRodSwgSnVuIDI2LCAyMDE0IGF0IDA4OjM2OjI0UE0gKzAxMDAsIEFsZXgg V2lsbGlhbXNvbiB3cm90ZToKPj4gT24gVGh1LCAyMDE0LTA2LTI2IGF0IDE5OjEwICswMDAwLCBD aGFsYW1hcmxhLCBUaXJ1bWFsZXNoIHdyb3RlOgo+PiA+IFRoYW5rcyBmb3IgdGhlIGNsYXJpZmlj YXRpb24gQWxleCwgVGhhdOKAmXMgZXhhY3RseSBteSBwb2ludCwgd2h5IGFyZSAKPj4gPiB3ZSBy ZWx5aW5nIG9uICBRRU1VIG9yIHNvbWV0aGluZyBlbHNlIHRvIGVtdWxhdGUgdGhlIE1TSSBzcGFj ZSB3aGVuIAo+PiA+IHdlIGNhbiBkaXJlY3RseSBnaXZlIGFjY2VzcyB0byBkZXZpY2VzIHVzaW5n IElUUyAob2YgY291cnNlIHdpdGggYSAKPj4gPiBzbWFsbCBlbXVsYXRpb24gY29kZSkuICBUaGlz IHdheSB3ZSBhcmUgYWxzbyBiZW5lZml0ZWQgZnJvbSBhbGwgSVRTIAo+PiA+IHNlcnZpY2VzIGxp a2UgVkNQVSBtaWdyYXRpb24gZXRjLgo+PiAKPj4gSSBoYXZlIG5vIGlkZWEgd2hhdCBJVFMgaXMu Cj4KPiBJVFMgaXMgdGhlIE1TSSBkb29yYmVsbCBmb3IgR0lDdjMgKEFSTSdzIGxhdGVzdCBpbnRl cnJ1cHQgY29udHJvbGxlcikuCj4KPiBJIGFncmVlIHRoYXQgd2Ugd2lsbCBuZWVkIGFuIElUUyBl bXVsYXRpb24gaWYgd2Ugd2FudCB0byB1c2UgTVNJcyBpbgo+PiB0aGUgZ3Vlc3QsIGFuZCBJIGJl bGlldmUgdGhhdCBNYXJjIChDQydkKSBoYWQgYWxyZWFkeSBzdGFydGVkCj4+IHRoaW5raW5nIGFi b3V0IHRoYXQuCj4KPgo+PiA+IFdoYXQgYWJvdXQgbm9uIFFFTVUgVkZJTyB1c2VycywgZm9yIGV4 YW1wbGUsIGlmIEkgd2FudGVkIHRvIHVzZSBWRklPIHRvCj4+ID4gYXNzaWduIGEgZGV2aWNlIHRv IGEgdXNlciBwcm9jZXNzIEkgZG9uJ3QgbmVlZCB0byBkZXBlbmQgb24gUUVNVS4gICBJCj4+ID4g dGhvdWdodCB0aGlzIGlzIG9uZSBvZiB0aGUgbWFpbiBnb2FscyBvZiB2ZmlvIHRvIG1ha2UgaXQg aW5kZXBlbmRlbnQgb2YKPj4gPiBoeXBlcnZpc29ycy4gICAgIAo+PiAKPj4gV2hlcmUgZGlkIFFF TVUgYmVjb21lIGEgcmVxdWlyZW1lbnQ/ICBNYXliZSBJJ20gbWlzc2luZyBzb21ldGhpbmcgaW4g Cj4+IHRoZSBBUk0gcGFydCBvZiB0aGUgY29udmVyc2F0aW9uIHRoYXQgZ290IGNob3BwZWQgb2Zm LCBidXQgdGhpcyBpcyAKPj4gZXhhY3RseSB3aHkgd2UgaGF2ZSB0aGUgVkZJTy9RRU1VIHNwbGl0 IHRoYXQgd2UgZG8uICBWRklPIHByb3ZpZGVzIAo+PiBiYXNpYyB2aXJ0dWFsaXphdGlvbiBmb3Ig Y29uZmlnIHNwYWNlIGFuZCByZXN0cmljdHMgYWNjZXNzIHRvIG90aGVyIAo+PiBhcmVhcyB0aGF0 IHVzZXJzIHNob3VsZG4ndCBiZSBhbGxvd2VkIHRvIGNoYW5nZS4gIFFFTVUgaXMganVzdCBvbmUg Cj4+IGV4YW1wbGUgb2YgYSB1c2Vyc3BhY2UgVkZJTyBkcml2ZXIuICBRRU1VIHRha2VzIHRoZSBk ZWNvbXBvc2VkIGRldmljZSAKPj4gZXhwb3NlZCB0aHJvdWdoIHRoZSBWRklPIEFCSSBhbmQgcmUt Y3JlYXRlcyBhIFBDSSBkZXZpY2Ugb3V0IG9mIGl0LiAgCj4+IFZGSU8gaXRzZWxmIGhhcyBubyBk ZXBlbmRlbmN5IG9uIFFFTVUuICBUaGFua3MsCj4KPiBJIGFsc28gZG9uJ3QgdW5kZXJzdGFuZCB0 aGUgUUVNVSBwYXJ0IGhlcmUuIFRoZSBNU0kgZW11bGF0aW9uIHdvdWxkIGJlCj4+IGluIHRoZSBr ZXJuZWwsIGp1c3QgbGlrZSB0aGUgR0lDdjIgZW11bGF0aW9uIHRoYXQgd2UgYWxyZWFkeQo+PiBo YXZlLiBGb3IgdXNlcnNwYWNlIGRyaXZlcnMsIHdvdWxkbid0IHlvdSBqdXN0IHVzZSBldmVudGZk IHJhdGhlcgo+PiB0aGFuIGJvdGhlciB3aXRoIGVtdWxhdGluZyBNU0lzPwo+Cj4gRmluYWxseSwg dGhlIGludGVycnVwdCByZW1hcHBpbmcgcGFydCBpcyBhYm91dCB0aGUgU01NVSBwcmV2ZW50aW5n IE1TSQo+PiB3cml0ZXMgdG8gYXJiaXRyYXJ5IHBvcnRpb25zIG9mIHRoZSBob3N0IGFkZHJlc3Mg c3BhY2UuIFRoZSBJVFMgaXMKPj4gYWJvdXQgcm91dGluZyBpbnRlcnJ1cHRzIHRvIENQVXMuCj4K PiBXaWxsCgotLSAKSmF6eiBpcyBub3QgZGVhZC4gSXQganVzdCBzbWVsbHMgZnVubnkuCl9fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmlvbW11IG1haWxpbmcg bGlzdAppb21tdUBsaXN0cy5saW51eC1mb3VuZGF0aW9uLm9yZwpodHRwczovL2xpc3RzLmxpbnV4 Zm91bmRhdGlvbi5vcmcvbWFpbG1hbi9saXN0aW5mby9pb21tdQ== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751953AbaF1HFt (ORCPT ); Sat, 28 Jun 2014 03:05:49 -0400 Received: from fw-tnat.austin.arm.com ([217.140.110.23]:12384 "EHLO collaborate-mta1.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751001AbaF1HFr convert rfc822-to-8bit (ORCPT ); Sat, 28 Jun 2014 03:05:47 -0400 From: Marc Zyngier To: "Chalamarla\, Tirumalesh" Cc: Will Deacon , Alex Williamson , Joerg Roedel , "kvm\@vger.kernel.org" , open list , "stuart.yoder\@freescale.com" , "iommu\@lists.linux-foundation.org" , "tech\@virtualopensystems.com" , "kvmarm\@lists.cs.columbia.edu" , "moderated list\:ARM SMMU DRIVER" Subject: Re: [RFC PATCH v6 04/20] iommu/arm-smmu: add capability IOMMU_CAP_INTR_REMAP In-Reply-To: <2645e3a22f5e4ae9994c0ee8fa327cb4@BY2PR07MB203.namprd07.prod.outlook.com> (Tirumalesh Chalamarla's message of "Fri, 27 Jun 2014 22:57:28 +0100") Organization: ARM Ltd References: <20140616151329.GQ16758@arm.com> <20140616152157.GB31771@8bytes.org> <20140616152526.GR16758@arm.com> <20140616153832.GC31771@8bytes.org> <9353770066894e85809e1e443b71d1cd@BY2PR07MB203.namprd07.prod.outlook.com> <748dccbbd3284521af4659ccbbb11453@BY2PR07MB203.namprd07.prod.outlook.com> <1403809223.31091.137.camel@ul30vt.home> <1403811384.31091.151.camel@ul30vt.home> <20140627084722.GB26276@arm.com> <2645e3a22f5e4ae9994c0ee8fa327cb4@BY2PR07MB203.namprd07.prod.outlook.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) Date: Sat, 28 Jun 2014 08:05:28 +0100 Message-ID: <86ionl4ipz.fsf@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 27 2014 at 10:57:28 PM, "Chalamarla, Tirumalesh" wrote: > Marc, > > What is your opinion on ITS emulation . is it should be part > of KVM or VFIO. Making any sort of emulation part of VFIO sounds quite wrong. That's not what VFIO is about, at all. Emulation belongs to the hypervisor, and nowhere else. > Also this code needs to depend on ITS host driver a lot, Host > ITS driver needs to have an interface for this code to use. You can share the command interface as some form of library, but that's about it. There is no more relationship between the ITS driver and the ITS emulation as there is between the GIC driver and its emulation counterpart. M. > Thanks, > Tirumalesh > > -----Original Message----- > From: Will Deacon [mailto:will.deacon@arm.com] > Sent: Friday, June 27, 2014 1:47 AM > To: Alex Williamson > Cc: Chalamarla, Tirumalesh; Joerg Roedel; kvm@vger.kernel.org; open list; stuart.yoder@freescale.com; iommu@lists.linux-foundation.org; tech@virtualopensystems.com; kvmarm@lists.cs.columbia.edu; moderated list:ARM SMMU DRIVER; marc.zyngier@arm.com > Subject: Re: [RFC PATCH v6 04/20] iommu/arm-smmu: add capability IOMMU_CAP_INTR_REMAP > > On Thu, Jun 26, 2014 at 08:36:24PM +0100, Alex Williamson wrote: >> On Thu, 2014-06-26 at 19:10 +0000, Chalamarla, Tirumalesh wrote: >> > Thanks for the clarification Alex, That’s exactly my point, why are >> > we relying on QEMU or something else to emulate the MSI space when >> > we can directly give access to devices using ITS (of course with a >> > small emulation code). This way we are also benefited from all ITS >> > services like VCPU migration etc. >> >> I have no idea what ITS is. > > ITS is the MSI doorbell for GICv3 (ARM's latest interrupt controller). > > I agree that we will need an ITS emulation if we want to use MSIs in >> the guest, and I believe that Marc (CC'd) had already started >> thinking about that. > > >> > What about non QEMU VFIO users, for example, if I wanted to use VFIO to >> > assign a device to a user process I don't need to depend on QEMU. I >> > thought this is one of the main goals of vfio to make it independent of >> > hypervisors. >> >> Where did QEMU become a requirement? Maybe I'm missing something in >> the ARM part of the conversation that got chopped off, but this is >> exactly why we have the VFIO/QEMU split that we do. VFIO provides >> basic virtualization for config space and restricts access to other >> areas that users shouldn't be allowed to change. QEMU is just one >> example of a userspace VFIO driver. QEMU takes the decomposed device >> exposed through the VFIO ABI and re-creates a PCI device out of it. >> VFIO itself has no dependency on QEMU. Thanks, > > I also don't understand the QEMU part here. The MSI emulation would be >> in the kernel, just like the GICv2 emulation that we already >> have. For userspace drivers, wouldn't you just use eventfd rather >> than bother with emulating MSIs? > > Finally, the interrupt remapping part is about the SMMU preventing MSI >> writes to arbitrary portions of the host address space. The ITS is >> about routing interrupts to CPUs. > > Will -- Jazz is not dead. It just smells funny.