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From: Marc Zyngier <maz@kernel.org>
To: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Fuad Tabba <tabba@google.com>, Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>
Subject: Re: [PATCH v3 00/42] KVM: arm64: Revamp Fine Grained Trap handling
Date: Mon, 28 Apr 2025 22:42:24 +0100	[thread overview]
Message-ID: <86jz74hsjj.wl-maz@kernel.org> (raw)
In-Reply-To: <4e63a13f-c5dc-4f97-879a-26b5548da07f@os.amperecomputing.com>

On Mon, 28 Apr 2025 19:33:10 +0100,
Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com> wrote:
> 
> Hi Marc,
> 
> I am trying nv-next branch and I believe these FGT related changes are
> merged. With this, selftest arm64/set_id_regs is failing. From initial
> debug it seems, the register access of SYS_CTR_EL0, SYS_MIDR_EL1,
> SYS_REVIDR_EL1 and SYS_AIDR_EL1 from guest_code is resulting in trap
> to EL2 (HCR_ID1,ID2 are set) and is getting forwarded back to EL1,
> since EL1 sync handler is not installed in the test code, resulting in
> hang(endless guest_exit/entry).

I don't see this problem here. At the very least, an EL1 Linux guest
runs just fine accessing these registers.

> 
> It is due to function "triage_sysreg_trap" is returning true.
> 
> When guest_code is in EL1 (default case) it is due to return in below if.
> 
>  if (tc.fgt != __NO_FGT_GROUP__ &&
>             (vcpu->kvm->arch.fgu[tc.fgt] & BIT(tc.bit))) {
>                 kvm_inject_undefined(vcpu);
>                 return true;
>         }
> 
> IMO, Host should return the value of these sysreg read instead of
> forwarding the trap to guest or something more to be added to
> testcode?

This is not a forward. It is an UNDEF. But none of these system
registers are ever supposed to UNDEF.

So something is setting the FGU bit mapped to HFGRTR_EL2.MIDR_EL1 to
1, and forces the register to UNDEF, assuming your analysis is
correct. I'm afraid you'll have to dig a bit deeper.

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2025-04-28 21:42 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-26 12:27 [PATCH v3 00/42] KVM: arm64: Revamp Fine Grained Trap handling Marc Zyngier
2025-04-26 12:27 ` [PATCH v3 01/42] arm64: sysreg: Add ID_AA64ISAR1_EL1.LS64 encoding for FEAT_LS64WB Marc Zyngier
2025-04-29 13:34   ` Joey Gouly
2025-04-26 12:27 ` [PATCH v3 02/42] arm64: sysreg: Update ID_AA64MMFR4_EL1 description Marc Zyngier
2025-04-29 13:38   ` Joey Gouly
2025-04-26 12:27 ` [PATCH v3 03/42] arm64: sysreg: Add layout for HCR_EL2 Marc Zyngier
2025-04-29 14:02   ` Joey Gouly
2025-04-26 12:27 ` [PATCH v3 04/42] arm64: sysreg: Replace HGFxTR_EL2 with HFG{R,W}TR_EL2 Marc Zyngier
2025-04-29 13:07   ` Ben Horgan
2025-04-29 14:26   ` Joey Gouly
2025-05-01 13:20     ` Marc Zyngier
2025-04-26 12:27 ` [PATCH v3 05/42] arm64: sysreg: Update ID_AA64PFR0_EL1 description Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 06/42] arm64: sysreg: Update PMSIDR_EL1 description Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 07/42] arm64: sysreg: Update TRBIDR_EL1 description Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 08/42] arm64: sysreg: Add registers trapped by HFG{R,W}TR2_EL2 Marc Zyngier
2025-05-01 10:11   ` Joey Gouly
2025-05-01 13:46     ` Marc Zyngier
2025-05-01 13:52       ` Joey Gouly
2025-04-26 12:28 ` [PATCH v3 09/42] arm64: sysreg: Add registers trapped by HDFG{R,W}TR2_EL2 Marc Zyngier
2025-04-29 13:07   ` Ben Horgan
2025-04-29 14:10     ` Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 10/42] arm64: sysreg: Add system instructions trapped by HFGIRT2_EL2 Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 11/42] arm64: Remove duplicated sysreg encodings Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 12/42] arm64: tools: Resync sysreg.h Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 13/42] arm64: Add syndrome information for trapped LD64B/ST64B{,V,V0} Marc Zyngier
2025-05-01 10:17   ` Joey Gouly
2025-04-26 12:28 ` [PATCH v3 14/42] arm64: Add FEAT_FGT2 capability Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 15/42] KVM: arm64: Tighten handling of unknown FGT groups Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 16/42] KVM: arm64: Simplify handling of negative FGT bits Marc Zyngier
2025-05-01 10:43   ` Joey Gouly
2025-04-26 12:28 ` [PATCH v3 17/42] KVM: arm64: Handle trapping of FEAT_LS64* instructions Marc Zyngier
2025-04-29 13:08   ` Ben Horgan
2025-05-01 11:01   ` Joey Gouly
2025-04-26 12:28 ` [PATCH v3 18/42] KVM: arm64: Restrict ACCDATA_EL1 undef to FEAT_ST64_ACCDATA being disabled Marc Zyngier
2025-04-29 13:08   ` Ben Horgan
2025-04-26 12:28 ` [PATCH v3 19/42] KVM: arm64: Don't treat HCRX_EL2 as a FGT register Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 20/42] KVM: arm64: Plug FEAT_GCS handling Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 21/42] KVM: arm64: Compute FGT masks from KVM's own FGT tables Marc Zyngier
2025-05-01 11:32   ` Joey Gouly
2025-04-26 12:28 ` [PATCH v3 22/42] KVM: arm64: Add description of FGT bits leading to EC!=0x18 Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 23/42] KVM: arm64: Use computed masks as sanitisers for FGT registers Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 24/42] KVM: arm64: Unconditionally configure fine-grain traps Marc Zyngier
2025-04-29 13:08   ` Ben Horgan
2025-04-29 13:49     ` Marc Zyngier
2025-04-29 14:09       ` Ben Horgan
2025-04-26 12:28 ` [PATCH v3 25/42] KVM: arm64: Propagate FGT masks to the nVHE hypervisor Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 26/42] KVM: arm64: Use computed FGT masks to setup FGT registers Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 27/42] KVM: arm64: Remove hand-crafted masks for " Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 28/42] KVM: arm64: Use KVM-specific HCRX_EL2 RES0 mask Marc Zyngier
2025-05-01 13:33   ` Joey Gouly
2025-04-26 12:28 ` [PATCH v3 29/42] KVM: arm64: Handle PSB CSYNC traps Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 30/42] KVM: arm64: Switch to table-driven FGU configuration Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 31/42] KVM: arm64: Validate FGT register descriptions against RES0 masks Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 32/42] KVM: arm64: Use FGT feature maps to drive RES0 bits Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 33/42] KVM: arm64: Allow kvm_has_feat() to take variable arguments Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 34/42] KVM: arm64: Use HCRX_EL2 feature map to drive fixed-value bits Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 35/42] KVM: arm64: Use HCR_EL2 " Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 36/42] KVM: arm64: Add FEAT_FGT2 registers to the VNCR page Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 37/42] KVM: arm64: Add sanitisation for FEAT_FGT2 registers Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 38/42] KVM: arm64: Add trap routing " Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 39/42] KVM: arm64: Add context-switch " Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 40/42] KVM: arm64: Allow sysreg ranges for FGT descriptors Marc Zyngier
2025-04-29 13:08   ` Ben Horgan
2025-04-26 12:28 ` [PATCH v3 41/42] KVM: arm64: Add FGT descriptors for FEAT_FGT2 Marc Zyngier
2025-04-29 13:09   ` Ben Horgan
2025-04-29 14:30     ` Marc Zyngier
2025-04-26 12:28 ` [PATCH v3 42/42] KVM: arm64: Handle TSB CSYNC traps Marc Zyngier
2025-04-28 18:33 ` [PATCH v3 00/42] KVM: arm64: Revamp Fine Grained Trap handling Ganapatrao Kulkarni
2025-04-28 21:42   ` Marc Zyngier [this message]
2025-04-29  7:34   ` Marc Zyngier
2025-04-29 14:30     ` Ganapatrao Kulkarni

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