From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4628825771; Sun, 16 Feb 2025 18:09:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739729366; cv=none; b=fVgrtwIs9ed3xxfYDt0arEi10r3v4DdPBrUKijio+s5sMKM5/He+bd6jDUfz/B5vkKx+BLzpCa+oZWe7qr48bRt4fsoKaVMGFwv214GdtyxDYShwl+yM/2nEZISj2c3gXPp102rYfmwPaNYm07mXODSy/fvhz+wxpvcvaOewTww= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739729366; c=relaxed/simple; bh=O/E/r5ASZKXffJhOIy6Fl6+74Z3ePdDBUDsU152mGFo=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=pFv5CANTSvKpmvaDC3IyshTEUxSZPwVHh5eavLCKKxEKvlU5savl9vCsFeUsKTwEEcKFtB0Rqu/Re6aa2d4Jegh/g0MlH6L4pW4ZtmR1ZnAwnE7AZK19dJpyO2uYL2qAYHkcin60t6adxH+xDv5/JQxxdJQ8RChBEx+P2EhaLpQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=H7T9LPn/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="H7T9LPn/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A44A3C4CEDD; Sun, 16 Feb 2025 18:09:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739729365; bh=O/E/r5ASZKXffJhOIy6Fl6+74Z3ePdDBUDsU152mGFo=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=H7T9LPn/uWmvfZ3KjI/F5rPc6+db5eXkhogkBeuN9CI8rMEPFVh7XxqOL8KB06fKl qVmjn6fQlFMHzLN5F6ExW0YX8OK1LO6DJIg5ODqks3r1WAgAOz+fkKUDFWoZqQnDOn lLx70FoaNJ7P57N0iWy7/zZM8QIXgTXy5iN8i+o49YCWbpO6eYzQFr1/h8GFwUthbq 3oco4TwdcLfZg+Jmz2tdM2MTnC7r6gFRBLyL2xnfq5/O57ihh/pvznnwv/tV/YV0GQ gAUz+veYkHclqDTncQWNEAXgDS5Q0o5v1UDkzI8aUkSzX0/S1p+4Ulk4yZopzxQ+8A M6Y9AaMq+bKjA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tjj51-004b85-7o; Sun, 16 Feb 2025 18:09:23 +0000 Date: Sun, 16 Feb 2025 18:09:22 +0000 Message-ID: <86jz9psqwd.wl-maz@kernel.org> From: Marc Zyngier To: luoyonggang@gmail.com Cc: Oliver Upton , Sebastian Ott , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Shameer Kolothum , Cornelia Huck , Eric Auger , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/4] KVM: arm64: Allow userspace to change MIDR_EL1 In-Reply-To: References: <20250211143910.16775-1-sebott@redhat.com> <20250211143910.16775-2-sebott@redhat.com> <87v7tb17os.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: luoyonggang@gmail.com, oliver.upton@linux.dev, sebott@redhat.com, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, shameerali.kolothum.thodi@huawei.com, cohuck@redhat.com, eric.auger@redhat.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Sat, 15 Feb 2025 19:04:20 +0000, "=E7=BD=97=E5=8B=87=E5=88=9A(Yonggang Luo)" wrote: >=20 > According to this, the MIDR EL1 is updated properly, but the MIDR for > aarch32 is not updated, and I don't know how to hook the update for > MIDR for aarch32 It is the same thing. The AArch32 view is configured the same way as the AArch64 view, and there is nothing to do at all (that's what VPIDR_EL2 is all about). With Oliver's change, I'm correctly getting a different MIDR using a hacked up kvmtool, see below. I suspect you're not running with the correct patch applied. M. * kvmtool hack: diff --git a/arm/aarch64/kvm-cpu.c b/arm/aarch64/kvm-cpu.c index c8be10b..f8ecbfe 100644 --- a/arm/aarch64/kvm-cpu.c +++ b/arm/aarch64/kvm-cpu.c @@ -128,6 +128,18 @@ static void reset_vcpu_aarch64(struct kvm_cpu *vcpu) } } =20 +static void reset_vcpu_midr(struct kvm_cpu *vcpu) +{ + struct kvm_one_reg reg; + u64 midr =3D 0xbadf00d5; + + reg.id =3D ARM64_SYS_REG(ARM_CPU_ID, 0); + reg.addr =3D (u64)&midr; + + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) + die("KVM_SET_ONE_REG failed (set_midr vcpu%ld", vcpu->cpu_id); +} + void kvm_cpu__select_features(struct kvm *kvm, struct kvm_vcpu_init *init) { if (kvm->cfg.arch.aarch32_guest) { @@ -181,6 +193,8 @@ void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu) die_perror("sched_setaffinity"); } =20 + reset_vcpu_midr(vcpu); + if (kvm->cfg.arch.aarch32_guest) return reset_vcpu_aarch32(vcpu); else * arm64 host: $ cat /proc/cpuinfo=20 processor : 0 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x0 CPU part : 0xd03 CPU revision : 4 * arm64 guest: # cat /proc/cpuinfo processor : 0 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid CPU implementer : 0xba CPU architecture: 8 CPU variant : 0xd CPU part : 0x00d CPU revision : 5 * arm32 guest: # cat /proc/cpuinfo=20 processor : 0 model name : ARMv7 Processor rev 5 (v7l) BogoMIPS : 200.00 Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vf= pd32 lpae evtstrm aes pmull sha1 sha2 crc32=20 CPU implementer : 0xba CPU architecture: 7 CPU variant : 0xd CPU part : 0x00d CPU revision : 5 --=20 Without deviation from the norm, progress is not possible.