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From: Marc Zyngier <maz@kernel.org>
To: Zenghui Yu <yuzenghui@huawei.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <tglx@linutronix.de>,
	<wanghaibin.wang@huawei.com>
Subject: Re: [PATCH] irqchip/gic-v3: Fix GICD_CTLR register naming
Date: Wed, 09 Jul 2025 17:27:03 +0100	[thread overview]
Message-ID: <86ldox9voo.wl-maz@kernel.org> (raw)
In-Reply-To: <20250709130046.1354-1-yuzenghui@huawei.com>

On Wed, 09 Jul 2025 14:00:46 +0100,
Zenghui Yu <yuzenghui@huawei.com> wrote:
> 
> It was incorrectly named as GICD_CTRL in a pr_info() and comments. Fix
> them.
> 
> Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
> ---
>  drivers/irqchip/irq-gic-v3.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> index efc791c43d44..dbeb85677b08 100644
> --- a/drivers/irqchip/irq-gic-v3.c
> +++ b/drivers/irqchip/irq-gic-v3.c
> @@ -190,12 +190,12 @@ static void __init gic_prio_init(void)
>  
>  	/*
>  	 * How priority values are used by the GIC depends on two things:
> -	 * the security state of the GIC (controlled by the GICD_CTRL.DS bit)
> +	 * the security state of the GIC (controlled by the GICD_CTLR.DS bit)
>  	 * and if Group 0 interrupts can be delivered to Linux in the non-secure
>  	 * world as FIQs (controlled by the SCR_EL3.FIQ bit). These affect the
>  	 * way priorities are presented in ICC_PMR_EL1 and in the distributor:
>  	 *
> -	 * GICD_CTRL.DS | SCR_EL3.FIQ | ICC_PMR_EL1 | Distributor
> +	 * GICD_CTLR.DS | SCR_EL3.FIQ | ICC_PMR_EL1 | Distributor
>  	 * -------------------------------------------------------
>  	 *      1       |      -      |  unchanged  |  unchanged
>  	 * -------------------------------------------------------
> @@ -223,7 +223,7 @@ static void __init gic_prio_init(void)
>  		dist_prio_nmi = __gicv3_prio_to_ns(dist_prio_nmi);
>  	}
>  
> -	pr_info("GICD_CTRL.DS=%d, SCR_EL3.FIQ=%d\n",
> +	pr_info("GICD_CTLR.DS=%d, SCR_EL3.FIQ=%d\n",
>  		cpus_have_security_disabled,
>  		!cpus_have_group0);
>  }

Hey, even people at ARM have made the same creative typo[1]!

Acked-by: Marc Zyngier <maz@kernel.org>

Thanks,

	M.

[1] https://developer.arm.com/documentation/198123/0302/Appendix--Legacy-operation

-- 
Without deviation from the norm, progress is not possible.


  reply	other threads:[~2025-07-09 21:58 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-09 13:00 [PATCH] irqchip/gic-v3: Fix GICD_CTLR register naming Zenghui Yu
2025-07-09 16:27 ` Marc Zyngier [this message]
2025-07-18 14:12 ` [tip: irq/drivers] " tip-bot2 for Zenghui Yu

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