From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11B73C6FD18 for ; Tue, 28 Mar 2023 15:50:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233252AbjC1Pun (ORCPT ); Tue, 28 Mar 2023 11:50:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232963AbjC1Pul (ORCPT ); Tue, 28 Mar 2023 11:50:41 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4305AB1 for ; Tue, 28 Mar 2023 08:50:40 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 99FB7B81D80 for ; Tue, 28 Mar 2023 15:50:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5B6D9C4339C; Tue, 28 Mar 2023 15:50:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1680018637; bh=jpApJo4Ce+FC1978hcuTlP553yPg0g/tC+WmclLtIds=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=uaf24KDAro23veHvLyfzJXtEZ6naJvtRmisSL6AFTDS+h0/pHyZrmN99iiadMSAXx g8z8RG63hHFYU24sGyhLU+2FZeilrfCRPUVwDdx1sKgDM1WPIuG0q7yoLA6aVV3uHo uJr8ACunq2P5qtovloHqZcILM2dCuAeDlq8oJTZhFnZh4FEKi31OfppvmL51dqh84y yr0z5C9TpOc+UYTR2P6+KsJhwu3n9C16SmcZzvNX2mkxT0dkAGi2C/endu3a+kaIDS M4aDdcRxCAWhw2qGhhVxVtK68888o/fBWhpEVDvUDVQezLXa96FYbSYaUUFGsfaO9d QVHYRnh9gNU4g== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1phBal-003p5B-3c; Tue, 28 Mar 2023 16:50:35 +0100 Date: Tue, 28 Mar 2023 16:50:34 +0100 Message-ID: <86lejgx4c5.wl-maz@kernel.org> From: Marc Zyngier To: Sean Christopherson Cc: Colton Lewis , pbonzini@redhat.com, shuah@kernel.org, dmatlack@google.com, vipinsh@google.com, andrew.jones@linux.dev, bgardon@google.com, ricarkol@google.com, oliver.upton@linux.dev, kvm@vger.kernel.org Subject: Re: [PATCH v2 1/2] KVM: selftests: Provide generic way to read system counter In-Reply-To: References: <87y1nvgv8s.wl-maz@kernel.org> <86r0t9w5jp.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: seanjc@google.com, coltonlewis@google.com, pbonzini@redhat.com, shuah@kernel.org, dmatlack@google.com, vipinsh@google.com, andrew.jones@linux.dev, bgardon@google.com, ricarkol@google.com, oliver.upton@linux.dev, kvm@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Tue, 28 Mar 2023 16:38:37 +0100, Sean Christopherson wrote: > > On Tue, Mar 28, 2023, Marc Zyngier wrote: > > On Tue, 21 Mar 2023 19:10:04 +0000, > > Colton Lewis wrote: > > > In context, I'm trying to measure the time it takes to write to a buffer > > > *with dirty memory logging enabled*. What do you mean by zero? I can > > > confirm from running this code I am not measuring zero time. > > > > See my earlier point: the counter tick is a few MHz, and the CPU > > multiple GHz. > > On x86, the system counter (TSC) counts at multiple GHz, so we > should be able to continue with that approach for x86. > > > So unless "whatever" is something that takes a significant time (several > > thousands of CPU cycles), you'll measure nothing using the counter. Page > > faults will probably show, but not a normal access. > > > > The right tool for this job is to use PMU events, as they count at the CPU > > frequency. > > Out of curiosity, what does the kernel end up using for things like ndelay()? I > tried to follow the breadcrumbs for ARM and got as far as arm_arch_timer.c, but > after that I'm more than a bit lost. That's where it ends. We use the counter for everything. Even on ARMv8.6+ HW that is supposed to give you a 1GHz counter, implementations are allowed to perform "lumpy" increments (50MHz counter with increments of 20 per tick, for example). M. -- Without deviation from the norm, progress is not possible.