From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE62E1D3647 for ; Thu, 17 Oct 2024 11:54:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729166053; cv=none; b=fieW927QBNdg2VvrLqvjnamiOrlFvPPnhdkX8C36/Jlp1tyzL14Ey4xrs8e0z1qjmyQ3aqSauJQtC6RtoodU8y6TFKogM7g7gTu9t33bliuuexwKBTA6FECw1yh68w5PpdEwE2GL248Qoflyt42n1dNM3cr44GOLD3sgdnNKiXo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729166053; c=relaxed/simple; bh=Evp4cTCK7TCIkJdXtHnK1Q2ldTg3i60l7fhYKYaQeyE=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=awS0i3ePFbRuCURL5OS049UmRfoQ4Gn43I9h2IFNq3c3hQql7OMKLld4Uxsmr+Dh0zh1SFzMqetQHA+kWgzEhyccvulpa8ES7c8qbAevpdWaJLp3DfdP5eff/wpYlMzwZMDgEXktldXmLv9LZs+mezSDMj9rKPIoFJYvUSEkRtk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=l1e/mEo2; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="l1e/mEo2" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 88AFBC4CEC3; Thu, 17 Oct 2024 11:54:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1729166052; bh=Evp4cTCK7TCIkJdXtHnK1Q2ldTg3i60l7fhYKYaQeyE=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=l1e/mEo2Sa+2131tg0be3wTylopPkeqdsxpbM49r8SgDdokE7RFLEP6bi2iXhrmk5 hAQTs5aToRgBmsO8bu9/I2ANJq8kXjdDoUlb5VVN+5SKarTuPQzWs5jwz7LMg/WwLp FQzTT2ZXSkPGBvrQ3MsJTdtZaPYzobANDMjADqcvHOOASV6rE4+VOTVeSsAxie1NfN pnsyj1rStL2xF11VVGWpBvjqye0JExWziVoXsYvDm9dgPR0Dt+rh2L7mBLTCtNlXb4 hCNN3+SvxtrFMt6AtZPJRq5EnA6XgMo2IaLZRI8RuoepgToZJti0/nUXoALfnEkWCK LI8i6oU/CNkmQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1t1P50-004Qtm-CW; Thu, 17 Oct 2024 12:54:10 +0100 Date: Thu, 17 Oct 2024 12:54:09 +0100 Message-ID: <86msj33py6.wl-maz@kernel.org> From: Marc Zyngier To: Joey Gouly Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, anshuman.khandual@arm.com, james.morse@arm.com, Oliver Upton , Suzuki K Poulose , Zenghui Yu , Jing Zhang , Shameerali Kolothum Thodi , Catalin Marinas , Will Deacon Subject: Re: [PATCH v5 4/7] KVM: arm64: Fix missing traps of guest accesses to the MPAM registers In-Reply-To: <20241015133923.3910916-5-joey.gouly@arm.com> References: <20241015133923.3910916-1-joey.gouly@arm.com> <20241015133923.3910916-5-joey.gouly@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: joey.gouly@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, anshuman.khandual@arm.com, james.morse@arm.com, oliver.upton@linux.dev, suzuki.poulose@arm.com, yuzenghui@huawei.com, jingzhangos@google.com, shameerali.kolothum.thodi@huawei.com, catalin.marinas@arm.com, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 15 Oct 2024 14:39:20 +0100, Joey Gouly wrote: > > @@ -204,6 +205,35 @@ static inline void __deactivate_traps_hfgxtr(struct kvm_vcpu *vcpu) > __deactivate_fgt(hctxt, vcpu, kvm, HAFGRTR_EL2); > } > > +static inline void __activate_traps_mpam(struct kvm_vcpu *vcpu) > +{ > + u64 r = MPAM2_EL2_TRAPMPAM0EL1 | MPAM2_EL2_TRAPMPAM1EL1; > + > + if (!cpus_support_mpam()) > + return; > + > + /* trap guest access to MPAMIDR_EL1 */ > + if (mpam_cpus_have_mpam_hcr()) { > + write_sysreg_s(MPAMHCR_EL2_TRAP_MPAMIDR_EL1, SYS_MPAMHCR_EL2); > + } else { > + /* From v1.1 TIDR can trap MPAMIDR, set it unconditionally */ > + r |= MPAM2_EL2_TIDR; > + } > + > + write_sysreg_s(r, SYS_MPAM2_EL2); Please use the write_sysreg_el2() accessor, so that VHE under NV has an easier time, should we ever get there. > +} > + > +static inline void __deactivate_traps_mpam(void) > +{ > + if (!cpus_support_mpam()) > + return; > + > + write_sysreg_s(0, SYS_MPAM2_EL2); Same thing. > + > + if (mpam_cpus_have_mpam_hcr()) > + write_sysreg_s(MPAMHCR_HOST_FLAGS, SYS_MPAMHCR_EL2); > +} > + Thanks, M. -- Without deviation from the norm, progress is not possible.