From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 707AB3D75D3; Thu, 18 Jun 2026 08:00:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781769604; cv=none; b=DaQrGvOuTmlgfty5zN3LBbm6LF+3JqweTwZN/gRM1RfTiGCbVdPHCOWNTLoDl7NZsPfxtdEg3rQ8x2syRZAKAzTfFB5F4FyfoVeZJ+nk0Zsn1484/mQaCwI45pVLivzrY3zu3+iDMcc/kWOqmVBjIDo84ny4Q3+0ALL8oCAImeU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781769604; c=relaxed/simple; bh=L5/zWgWl+h0wCyKJXMMnPlP7q6s6UWWQgn9G4geS2JI=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=NLt1Ht8HUTTrgOAedrE/8Sl8/vWC9EfwaXKoG8A0DXRNZxPakH6lpS8yWc57RgDP0O5uLyeCAyxwdVnt4icJeFlV0ymS0vt61cfq6cjVchURA9K8kqgZzCeDDb64EXzZ9Pn9Kw2WXcq2Sllmr7S8iLwEif5PEVNXVD8y7p4GDFQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NbAF4aog; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NbAF4aog" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D528C1F000E9; Thu, 18 Jun 2026 08:00:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781769601; bh=Abrw7iIO0WPcwTnLAYnNjUabC/VyQYAVg4feuCtUHh0=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=NbAF4aogvkEOt8J7FJFok+yIJSRN3IfPSr/WUgzjsZ/Pvlk78VMLOcWFI4L3G9th+ QLfQCb22yc5d4i/gDBh5Y8XsyvsrkTfrrfL8dmL7NVRbX87xAhdTqYcZU3NErynJT1 gmOHEB8F0TccxrkuX1AKbURk+mP2NJrbgDpG8CQOmpCuOtNJfGsAuwkuYahnLeekml /ug6R09jP8bTMkp4kfPPAIYQ8rT/DuJW1CRGiWu0f8MCyiQAZwTwsjb37RHOzT25NB lsom2m5c82ftK9aFV7nzJ+Rnu8y13sPO1p4Kqnojj8Vb3kd9WmX6Dy2zd2PSJXbgF6 I+MoK4fLvwE3Q== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wa7fL-0000000Dv7H-0v1u; Thu, 18 Jun 2026 07:59:59 +0000 Date: Thu, 18 Jun 2026 08:59:58 +0100 Message-ID: <86o6h8s2gx.wl-maz@kernel.org> From: Marc Zyngier To: Fuad Tabba Cc: Oliver Upton , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, Catalin Marinas , Will Deacon , Joey Gouly , Steffen Eiden , Suzuki K Poulose , Zenghui Yu , Vincent Donnefort , Sascha Bischoff Subject: Re: [PATCH 4/7] KVM: arm64: Set IL for injected FPAC exceptions during ERET emulation In-Reply-To: <20260614163336.3490925-5-tabba@google.com> References: <20260614163336.3490925-1-tabba@google.com> <20260614163336.3490925-5-tabba@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tabba@google.com, oupton@kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, joey.gouly@arm.com, seiden@linux.ibm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, vdonnefort@google.com, Sascha.Bischoff@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Sun, 14 Jun 2026 17:33:33 +0100, Fuad Tabba wrote: > > The FPAC syndrome constructed during nested ERET emulation does not set > IL. For FPAC (EC=0x1C), IL reflects the instruction length. ERET and > its authenticated variants are always A64 32-bit instructions, so IL > must be 1. > > Fixes: 213b3d1ea161 ("KVM: arm64: nv: Handle ERETA[AB] instructions") > Signed-off-by: Fuad Tabba > --- > arch/arm64/kvm/emulate-nested.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c > index dba7ced74ca5..4b39363cf891 100644 > --- a/arch/arm64/kvm/emulate-nested.c > +++ b/arch/arm64/kvm/emulate-nested.c > @@ -2777,7 +2777,7 @@ void kvm_emulate_nested_eret(struct kvm_vcpu *vcpu) > */ > if (kvm_has_pauth(vcpu->kvm, FPACCOMBINE) && !(spsr & PSR_IL_BIT)) { > esr &= ESR_ELx_ERET_ISS_ERETA; > - esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_FPAC); > + esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_FPAC) | ESR_ELx_IL; In general, I prefer retaining information that is present in the source exception, rather than adding arbitrary bits without much context, even if we only support AArch64 for NV. In this case, I'd rather see this: esr &= (ESR_ELx_ERET_ISS_ERETA | ESR_ELx_IL); Thanks, M. -- Without deviation from the norm, progress is not possible.