From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 58E91E74AC8 for ; Tue, 3 Dec 2024 18:25:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Subject:Cc:To:From:Message-ID:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vfgtY+29SH3Y9JCrnAgg0/cpZYqUcHWn6QkZDblM6+g=; b=20PaDQKBbJV/Oles03LikBdn0Z JRFfcVQyz4h68e0MeLy919BHN66JyySz/8zY6cgiYIGDruGeh5VBxrmcrzSpWIgLQT4lh9mD+STRG CtJ5jNp5TYxxHtJe12p7it/gDVrC8GnWL3AzEcflt3Sv4GaCA4QDao1TRt8dUl7+ZHbSdqt6thHIM NoU3uCfOQ3EkrJArWvS2phVpSVBZlOlYOJMXiYG64cJQ2QywTOLeBvQJ6Tt06TfVHJ4iTGlJo4BMF 2pD11Nj/xC50SilfaqT7EPA9aqvjlwfbkqIvASvK7ihUSCwQGM7b/hNu4+r6GAUrzwo339CZ2yuaO HRb/fDwA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tIXaX-0000000AMkI-30Z2; Tue, 03 Dec 2024 18:25:33 +0000 Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tIXZW-0000000AMg4-3x7A for linux-arm-kernel@lists.infradead.org; Tue, 03 Dec 2024 18:24:32 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 7F36DA418AF; Tue, 3 Dec 2024 18:22:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 66666C4CECF; Tue, 3 Dec 2024 18:24:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1733250269; bh=LkUcom0wjyX5pMGQS2RTbiOOZ7uA3mpC4ZAHVBIDWEo=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=FWBM1VUnt/xCpWmaV1Fxy68bO9OSeaC0SiBBTxRYq4WA5iQDGZEHtXCSeuN4Qr3OA UzMqVHuBWBZ6iUS02+WKWqa0CC1NLnujDCBq6EXinPe1RpGNtW9JBxjgnYVMs3x1f/ 50bVUoFT3ePKs5DOWPb9qQ3pod/X8Y/+a2jo8hPOXS1uci/1MBMk1DbZFzJ/HJZQlD C2S/eiY6gQDKPIz4Lxle3y1KTeRQw6gioFgPTt9kOKxczPVPPqHdVlnUgoafHxiei7 Y+/R1QPTpPRsZV2m3vZ3MsEJpWpFKVOwXHhUwTXMyNIAGYPtKMnprx2q11cs1OiTO8 5TwZkobVoYkCg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tIXZT-000BsQ-A2; Tue, 03 Dec 2024 18:24:27 +0000 Date: Tue, 03 Dec 2024 18:24:26 +0000 Message-ID: <86o71styjp.wl-maz@kernel.org> From: Marc Zyngier To: Catalin Marinas Cc: linux-arm-kernel@lists.infradead.org, Will Deacon , Mark Rutland , James Morse Subject: Re: [PATCH] arm64: Ensure bits ASID[15:8] are masked out when the kernel uses 8-bit ASIDs In-Reply-To: <20241203151941.353796-1-catalin.marinas@arm.com> References: <20241203151941.353796-1-catalin.marinas@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, will@kernel.org, mark.rutland@arm.com, james.morse@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241203_102431_116306_E8008B0A X-CRM114-Status: GOOD ( 28.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 03 Dec 2024 15:19:41 +0000, Catalin Marinas wrote: > > Linux currently sets the TCR_EL1.AS bit unconditionally during CPU > bring-up. On an 8-bit ASID CPU, this is RES0 and ignored, otherwise > 16-bit ASIDs are enabled. However, if running in a VM and the hypervisor > reports 8-bit ASIDs (ID_AA64MMFR0_EL1.ASIDBits == 0) on a 16-bit ASIDs > CPU, Linux uses bits 8 to 63 as a generation number for tracking old > process ASIDs. The bottom 8 bits of this generation end up being written > to TTBR1_EL1 and also used for the ASID-based TLBI operations as the > upper 8 bits of the ASID. Following an ASID roll-over event we can have > threads of the same application with the same 8-bit ASID but different > generation numbers running on separate CPUs. Both TLB caching and the > TLBI operations will end up using different actual 16-bit ASIDs for the > same process. > > A similar scenario can happen in a big.LITTLE configuration if the boot > CPU only uses 8-bit ASIDs while secondary CPUs have 16-bit ASIDs. > > Ensure that the ASID generation is only tracked by bits 16 and up, > leaving bits 15:8 as 0 if the kernel uses 8-bit ASIDs. Note that > clearing TCR_EL1.AS is not sufficient since the architecture requires > that the top 8 bits of the ASID passed to TLBI instructions are 0 rather > than ignored in such configuration. > > Signed-off-by: Catalin Marinas > Cc: > Cc: Will Deacon > Cc: Mark Rutland > Cc: Marc Zyngier > Cc: James Morse > --- > arch/arm64/mm/context.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c > index 188197590fc9..b2ac06246327 100644 > --- a/arch/arm64/mm/context.c > +++ b/arch/arm64/mm/context.c > @@ -32,9 +32,9 @@ static unsigned long nr_pinned_asids; > static unsigned long *pinned_asid_map; > > #define ASID_MASK (~GENMASK(asid_bits - 1, 0)) > -#define ASID_FIRST_VERSION (1UL << asid_bits) > +#define ASID_FIRST_VERSION (1UL << 16) > > -#define NUM_USER_ASIDS ASID_FIRST_VERSION > +#define NUM_USER_ASIDS (1UL << asid_bits) > #define ctxid2asid(asid) ((asid) & ~ASID_MASK) > #define asid2ctxid(asid, genid) ((asid) | (genid)) Acked-by: Marc Zyngier In the light of this, I think we also need to prevent VM migration from machines that have 8bit ASIDs to those that have 16bit ASIDs, because lying to the guest is potentially deadly, for the exact reasons outlined in the commit message. I'll post something tomorrow. Thanks, M. -- Without deviation from the norm, progress is not possible.