Re: [PATCH 2/2] arm64: dts: st: Use 128kB size for aliased GIC400 register access

[Marc Zyngier <maz@kernel.org>]

On Mon, 07 Apr 2025 09:40:28 +0100,
Christian Bruel <christian.bruel@foss.st.com> wrote:
> 
> Adjust the size of 8kB GIC regions to 128kB so that each 4kB is mapped
> to 64kB. The offset is then adjusted in the irq-gic driver.

nit: mapped *16 times* over a 64kB region.

> 
> see commit 12e14066f4835 ("irqchip/GIC: Add workaround for aliased GIC400")
> 
> Fixes: 5d30d03aaf785 ("arm64: dts: st: introduce stm32mp25 SoCs family")
> Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
> ---
>  arch/arm64/boot/dts/st/stm32mp251.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> index 379e290313dc..87110f91e489 100644
> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
> +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> @@ -119,9 +119,9 @@ intc: interrupt-controller@4ac00000 {
>  		#interrupt-cells = <3>;
>  		interrupt-controller;
>  		reg = <0x0 0x4ac10000 0x0 0x1000>,
> -		      <0x0 0x4ac20000 0x0 0x2000>,
> -		      <0x0 0x4ac40000 0x0 0x2000>,
> -		      <0x0 0x4ac60000 0x0 0x2000>;
> +		      <0x0 0x4ac20000 0x0 0x20000>,
> +		      <0x0 0x4ac40000 0x0 0x20000>,
> +		      <0x0 0x4ac60000 0x0 0x20000>;
>  	};
>  
>  	psci {

Suggested-by: Marc Zyngier <maz@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>

	M.

-- 
Without deviation from the norm, progress is not possible.