From: Marc Zyngier <maz@kernel.org>
To: Johan Hovold <johan@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
anna-maria@linutronix.de, shawnguo@kernel.org,
s.hauer@pengutronix.de, festevam@gmail.com, bhelgaas@google.com,
rdunlap@infradead.org, vidyas@nvidia.com,
ilpo.jarvinen@linux.intel.com, apatel@ventanamicro.com,
kevin.tian@intel.com, nipun.gupta@amd.com, den@valinux.co.jp,
andrew@lunn.ch, gregory.clement@bootlin.com,
sebastian.hesselbarth@gmail.com, gregkh@linuxfoundation.org,
rafael@kernel.org, alex.williamson@redhat.com, will@kernel.org,
lorenzo.pieralisi@arm.com, jgg@mellanox.com,
ammarfaizi2@gnuweeb.org, robin.murphy@arm.com,
lpieralisi@kernel.org, nm@ti.com, kristo@kernel.org,
vkoul@kernel.org, okaya@kernel.org, agross@kernel.org,
andersson@kernel.org, mark.rutland@arm.com,
shameerali.kolothum.thodi@huawei.com, yuzenghui@huawei.com,
shivamurthy.shastri@linutronix.de
Subject: Re: [patch V4 00/21] genirq, irqchip: Convert ARM MSI handling to per device MSI domains
Date: Tue, 16 Jul 2024 11:30:05 +0100 [thread overview]
Message-ID: <86r0bt39zm.wl-maz@kernel.org> (raw)
In-Reply-To: <ZpUtuS65AQTJ0kPO@hovoldconsulting.com>
On Mon, 15 Jul 2024 15:10:01 +0100,
Johan Hovold <johan@kernel.org> wrote:
>
> On Mon, Jul 15, 2024 at 01:58:13PM +0100, Marc Zyngier wrote:
> > On Mon, 15 Jul 2024 12:18:47 +0100,
> > Johan Hovold <johan@kernel.org> wrote:
> > > On Sun, Jun 23, 2024 at 05:18:31PM +0200, Thomas Gleixner wrote:
> > > > This is version 4 of the series to convert ARM MSI handling over to
> > > > per device MSI domains.
>
> > > This series only showed up in linux-next last Friday and broke interrupt
> > > handling on Qualcomm platforms like sc8280xp (e.g. Lenovo ThinkPad X13s)
> > > and x1e80100 that use the GIC ITS for PCIe MSIs.
> > >
> > > I've applied the series (21 commits from linux-next) on top of 6.10 and
> > > can confirm that the breakage is caused by commits:
> > >
> > > 3d1c927c08fc ("irqchip/gic-v3-its: Switch platform MSI to MSI parent")
> > > 233db05bc37f ("irqchip/gic-v3-its: Provide MSI parent for PCI/MSI[-X]")
> > >
> > > Applying the series up until the change before 3d1c927c08fc unbreaks the
> > > wifi on one machine:
> > >
> > > ath11k_pci 0006:01:00.0: failed to enable msi: -22
> > > ath11k_pci 0006:01:00.0: probe with driver ath11k_pci failed with error -22
> > >
> > > and backing up until the commit before 233db05bc37f makes the NVMe come
> > > up again during boot on another.
> > >
> > > I have not tried to debug this further.
> >
> > I need a few things from you though, because you're not giving much to
> > help you (and I'm travelling, which doesn't help).
>
> Yeah, this was just an early heads up.
>
> > Can you at least investigate what in ath11k_pci_alloc_msi() causes the
> > wifi driver to be upset? Does it normally use a single MSI vector or
> > MSI-X? How about your nVME device?
>
> It uses multiple vectors, but now it falls back to trying to allocate a
> single one and even that fails with -ENOSPC:
>
> ath11k_pci 0006:01:00.0: ath11k_pci_alloc_msi - requesting one vector failed: -28
>
> Similar for the NVMe, it uses multiple vectors normally, but now only
> the AER interrupts appears to be allocated for each controller and there
> is a GICv3 interrupt for the NVMe:
>
> 208: 0 0 0 0 0 0 0 0 ITS-PCI-MSI-0006:00:00.0 0 Edge PCIe PME, aerdrv
> 212: 0 0 0 0 0 0 0 0 ITS-PCI-MSI-0004:00:00.0 0 Edge PCIe PME, aerdrv
> 214: 161 0 0 0 0 0 0 0 GICv3 562 Level nvme0q0, nvme0q1
> 215: 0 0 0 0 0 0 0 0 ITS-PCI-MSI-0002:00:00.0 0 Edge PCIe PME, aerdrv
>
That's an indication of the driver having failed its MSI allocation
and gone back to INTx signalling.
> Next boot, after disabling PCIe controller async probing, it's an MSI-X?!:
>
> 201: 0 0 0 0 0 0 0 0 ITS-PCI-MSI-0006:00:00.0 0 Edge PCIe PME, aerdrv
> 203: 0 0 0 0 0 0 0 0 ITS-PCI-MSI-0004:00:00.0 0 Edge PCIe PME, aerdrv
> 205: 0 0 0 0 0 0 0 0 ITS-PCI-MSI-0002:00:00.0 0 Edge PCIe PME, aerdrv
> 206: 0 0 0 0 0 0 0 0 ITS-PCI-MSIX-0002:01:00.0 0 Edge nvme0q0
>
So is this issue actually tied to the async probing? Does it always
work if you disable it?
> This time ath11k vector allocation succeeded, but the driver times out
> eventually:
>
> [ 8.984619] ath11k_pci 0006:01:00.0: MSI vectors: 32
> [ 29.690841] ath11k_pci 0006:01:00.0: failed to power up mhi: -110
> [ 29.697136] ath11k_pci 0006:01:00.0: failed to start mhi: -110
> [ 29.703153] ath11k_pci 0006:01:00.0: failed to power up :-110
> [ 29.732144] ath11k_pci 0006:01:00.0: failed to create soc core: -110
> [ 29.738694] ath11k_pci 0006:01:00.0: failed to init core: -110
> [ 32.841758] ath11k_pci 0006:01:00.0: probe with driver ath11k_pci failed with error -110
>
> > It would also help if you could define the DEBUG symbol at the very
> > top of irq-gic-v3-its.c and report the debug information that the ITS
> > driver dumps.
>
> See below (with synchronous probing of the pcie controllers).
I don't see much going wrong there, and the ITS driver correctly
dishes out interrupts. I'll take the current -next for a ride on my
own HW and see what happens.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2024-07-16 10:30 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-23 15:18 [patch V4 00/21] genirq, irqchip: Convert ARM MSI handling to per device MSI domains Thomas Gleixner
2024-06-23 15:18 ` [patch V4 01/21] PCI/MSI: Provide MSI_FLAG_PCI_MSI_MASK_PARENT Thomas Gleixner
2024-06-26 19:05 ` [patch V4-1 " Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Shivamurthy Shastri
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Shivamurthy Shastri
2024-06-23 15:18 ` [patch V4 02/21] irqchip: Provide irq-msi-lib Thomas Gleixner
2024-07-01 10:18 ` Lorenzo Pieralisi
2024-07-03 13:57 ` Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 03/21] irqchip/gic-v3-its: Provide MSI parent infrastructure Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 04/21] irqchip/irq-msi-lib: Prepare for PCI MSI/MSIX Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 05/21] irqchip/gic-v3-its: Provide MSI parent for PCI/MSI[-X] Thomas Gleixner
2024-06-28 22:24 ` Catalin Marinas
2024-06-29 8:37 ` Thomas Gleixner
2024-06-29 9:42 ` Marc Zyngier
2024-06-29 9:50 ` Marc Zyngier
2024-06-29 10:11 ` Marc Zyngier
2024-06-29 10:44 ` Thomas Gleixner
2024-06-29 19:51 ` Thomas Gleixner
2024-06-30 9:55 ` Catalin Marinas
2024-06-29 9:18 ` Marc Zyngier
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 06/21] irqchip/irq-msi-lib: Prepare for DEVICE MSI to replace platform MSI Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 07/21] irqchip/mbigen: Prepare for real per device MSI Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 08/21] irqchip/irq-msi-lib: Prepare for DOMAIN_BUS_WIRED_TO_MSI Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 09/21] irqchip/gic-v3-its: Switch platform MSI to MSI parent Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 10/21] irqchip/mbigen: Remove platform_msi_create_device_domain() fallback Thomas Gleixner
2024-06-25 14:42 ` Lorenzo Pieralisi
2024-06-26 9:13 ` Hanjun Guo
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 11/21] genirq/msi: Remove platform_msi_create_device_domain() Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:39 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 12/21] irqchip/gic_v3_mbi: Switch over to parent domain Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:38 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 13/21] irqchip/gic-v2m: Switch to device MSI Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:38 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 14/21] irqchip/imx-mu-msi: Switch to MSI parent Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:38 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 15/21] irqchip/irq-mvebu-icu: Prepare for real per device MSI Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:38 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:18 ` [patch V4 16/21] irqchip/mvebu-gicp: Switch to MSI parent Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:38 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:19 ` [patch V4 17/21] irqchip/mvebu-odmi: Switch to parent MSI Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:38 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:19 ` [patch V4 18/21] irqchip/irq-mvebu-sei: Switch to MSI parent Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:38 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:19 ` [patch V4 19/21] irqchip/irq-mvebu-icu: Remove platform MSI leftovers Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:38 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:19 ` [patch V4 20/21] genirq/msi: " Thomas Gleixner
2024-06-25 10:02 ` Greg KH
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:38 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-23 15:19 ` [patch V4 21/21] genirq/msi: Move msi_device_data to core Thomas Gleixner
2024-07-10 16:25 ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-07-18 18:38 ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-06-25 19:46 ` [patch V4 00/21] genirq, irqchip: Convert ARM MSI handling to per device MSI domains Rob Herring
2024-06-26 19:03 ` Thomas Gleixner
2024-07-15 11:18 ` Johan Hovold
2024-07-15 12:58 ` Marc Zyngier
2024-07-15 14:10 ` Johan Hovold
2024-07-16 10:30 ` Marc Zyngier [this message]
2024-07-16 14:53 ` Johan Hovold
2024-07-16 18:21 ` Marc Zyngier
2024-07-17 7:23 ` Johan Hovold
2024-07-17 12:54 ` Marc Zyngier
2024-07-17 13:38 ` Johan Hovold
2024-07-17 18:07 ` Marc Zyngier
2024-07-17 20:10 ` Marc Zyngier
2024-07-18 7:30 ` Johan Hovold
2024-07-15 13:10 ` Thomas Gleixner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=86r0bt39zm.wl-maz@kernel.org \
--to=maz@kernel.org \
--cc=agross@kernel.org \
--cc=alex.williamson@redhat.com \
--cc=ammarfaizi2@gnuweeb.org \
--cc=andersson@kernel.org \
--cc=andrew@lunn.ch \
--cc=anna-maria@linutronix.de \
--cc=apatel@ventanamicro.com \
--cc=bhelgaas@google.com \
--cc=den@valinux.co.jp \
--cc=festevam@gmail.com \
--cc=gregkh@linuxfoundation.org \
--cc=gregory.clement@bootlin.com \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=jgg@mellanox.com \
--cc=johan@kernel.org \
--cc=kevin.tian@intel.com \
--cc=kristo@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=lpieralisi@kernel.org \
--cc=mark.rutland@arm.com \
--cc=nipun.gupta@amd.com \
--cc=nm@ti.com \
--cc=okaya@kernel.org \
--cc=rafael@kernel.org \
--cc=rdunlap@infradead.org \
--cc=robin.murphy@arm.com \
--cc=s.hauer@pengutronix.de \
--cc=sebastian.hesselbarth@gmail.com \
--cc=shameerali.kolothum.thodi@huawei.com \
--cc=shawnguo@kernel.org \
--cc=shivamurthy.shastri@linutronix.de \
--cc=tglx@linutronix.de \
--cc=vidyas@nvidia.com \
--cc=vkoul@kernel.org \
--cc=will@kernel.org \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.