From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keith Packard Subject: Re: [PATCH] xf86-video-intel: change order of DPMS operations Date: Thu, 08 Dec 2011 08:35:12 -0800 Message-ID: <86sjkv2f9b.fsf@sumi.keithp.com> References: <1323303641-13277-1-git-send-email-sque@chromium.org> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1316071081==" Return-path: Received: from keithp.com (home.keithp.com [63.227.221.253]) by gabe.freedesktop.org (Postfix) with ESMTP id 882BA9E7F8 for ; Thu, 8 Dec 2011 08:34:36 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson , jbarnes@virtuousgeek.org, intel-gfx@lists.freedesktop.org, eric@anholt.net Cc: Simon Que , bleung@chromium.org List-Id: intel-gfx@lists.freedesktop.org --===============1316071081== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" --=-=-= Content-Transfer-Encoding: quoted-printable On Thu, 08 Dec 2011 14:10:06 +0000, Chris Wilson = wrote: > I had to remind myself why both the driver and the kernel are both > touching the backlight across DPMS; the answer as I see it is that the > kernel only knows about the raw backlight interface whereas the driver > adjusts it via the preferred interface (which should handle the cases > where the backlight modulation is handled independently of the PWM > registers). Something in the kernel should be managing the backlight or we won't be doing this right when fbdev is running. User space should not have to know about the vagaries of the kernel backlight land. =2D-=20 keith.packard@intel.com --=-=-= Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUBTuDnQDYtFsjWk68qAQhtdA//UMvmfaqcYwNkmgptTOXz6lY5pHuU0vCk gjcsvwzHLjj7sQ9kk53olb79lEEi/xh0URysyr68K2LG9zzRbmK7uf4BE9ENSrcn Uq2vaujxCbpLVQXSHIJ5tXi7IzIdkNs/IPRHBqaoEVhQ/tLvkiLs3O5PUFG5UuJW +Tr5rf8HFJBHEkfwlYsfrJnNo1855aPpTeOFuMfU33nOPbrgVnmInG5Q02svduiG 4efWAxVpCFqaXSTLmJBHckAcGlmJJ6WulH6zav0vWgMhndn41w0ZAwClor2oHeIS lzA5igmpYSzc1E3yFoxafCQOIRSYNfrNzW+wk7uoaxPH88kh/Hfg8sevKNJWlby9 QeAhrJI9JhGa0kHRZM7LmYNtyIvb+Y1N+f0QZFnP9rOKIxHRR4+fyvkn12jLkYbv 4x77JvoDp/KTFQGVAB+PHeoe/2DKOKRveqZHtKK8GxFWPAmqlE7kEAABon8gYSwf 9fQZHf4Lwc4LPcTAEayRSVmQT7WfVp1E9D5HUDfc16wYoOUGecaTBhiHQAEg8TNn ST+pJkggoYexkFRhxDMv4fAEgwyi7dIpvUJkdKTMoI70517tIh6pXh+8M0JVXY5r HwIejENot9hEnJtBt0UIrelO2f/KPf4y41tDFfWqihptW+NVtY2Ys420lXNP3dqp RbSWiXRXpgs= =x7aD -----END PGP SIGNATURE----- --=-=-=-- --===============1316071081== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1316071081==--