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From: Marc Zyngier <maz@kernel.org>
To: Joey Gouly <joey.gouly@arm.com>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	kvm@vger.kernel.org, Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH 08/13] KVM: arm64: Move CNT*CT_EL0 userspace accessors to generic infrastructure
Date: Tue, 30 Sep 2025 13:05:05 +0100	[thread overview]
Message-ID: <86tt0kywlq.wl-maz@kernel.org> (raw)
In-Reply-To: <20250930104552.GB1093338@e124191.cambridge.arm.com>

On Tue, 30 Sep 2025 11:45:52 +0100,
Joey Gouly <joey.gouly@arm.com> wrote:
> 
> Observation below
> 
>   |
>   v
> 
> On Mon, Sep 29, 2025 at 05:04:52PM +0100, Marc Zyngier wrote:
> > Moving the counter registers is a bit more involved than for the control
> > and comparator (there is no shadow data for the counter), but still
> > pretty manageable.
> > 
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > ---
> >  arch/arm64/kvm/guest.c    |  7 -------
> >  arch/arm64/kvm/sys_regs.c | 34 +++++++++++++++++++++++++++++++---
> >  2 files changed, 31 insertions(+), 10 deletions(-)
> > 
> > diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
> > index c23ec9be4ce27..138e5e2dc10c8 100644
> > --- a/arch/arm64/kvm/guest.c
> > +++ b/arch/arm64/kvm/guest.c
> > @@ -592,19 +592,12 @@ static unsigned long num_core_regs(const struct kvm_vcpu *vcpu)
> >  }
> >  
> >  static const u64 timer_reg_list[] = {
> > -	KVM_REG_ARM_TIMER_CNT,
> > -	KVM_REG_ARM_PTIMER_CNT,
> >  };
> >  
> >  #define NUM_TIMER_REGS ARRAY_SIZE(timer_reg_list)
> >  
> >  static bool is_timer_reg(u64 index)
> >  {
> > -	switch (index) {
> > -	case KVM_REG_ARM_TIMER_CNT:
> > -	case KVM_REG_ARM_PTIMER_CNT:
> > -		return true;
> > -	}
> >  	return false;
> >  }
> >  
> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> > index 68e88d5c0dfb5..e67eb39ddc118 100644
> > --- a/arch/arm64/kvm/sys_regs.c
> > +++ b/arch/arm64/kvm/sys_regs.c
> > @@ -1605,12 +1605,38 @@ static int arch_timer_set_user(struct kvm_vcpu *vcpu,
> >  	case SYS_CNTHP_CTL_EL2:
> >  		val &= ~ARCH_TIMER_CTRL_IT_STAT;
> >  		break;
> > +	case SYS_CNTVCT_EL0:
> > +		if (!test_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET, &vcpu->kvm->arch.flags))
> > +			timer_set_offset(vcpu_vtimer(vcpu), kvm_phys_timer_read() - val);
> > +		return 0;
> > +	case SYS_CNTPCT_EL0:
> > +		if (!test_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET, &vcpu->kvm->arch.flags))
> > +			timer_set_offset(vcpu_ptimer(vcpu), kvm_phys_timer_read() - val);
> > +		return 0;
> >  	}
> >  
> >  	__vcpu_assign_sys_reg(vcpu, rd->reg, val);
> >  	return 0;
> >  }
> >  
> > +static int arch_timer_get_user(struct kvm_vcpu *vcpu,
> > +			       const struct sys_reg_desc *rd,
> > +			       u64 *val)
> > +{
> > +	switch (reg_to_encoding(rd)) {
> > +	case SYS_CNTVCT_EL0:
> > +		*val = kvm_phys_timer_read() - timer_get_offset(vcpu_vtimer(vcpu));
> > +		break;
> > +	case SYS_CNTPCT_EL0:
> > +		*val = kvm_phys_timer_read() - timer_get_offset(vcpu_ptimer(vcpu));
> > +		break;
> > +	default:
> > +		*val = __vcpu_sys_reg(vcpu, rd->reg);
> 
> Unsure if this is actually an issue but for the _CTL registers, via
> access_arch_timer() (kvm_arm_timer_read_sysreg() -> .. -> read_timer_ctl()),
> the ARCH_TIMER_CTRL_IT_STAT bit will be set if the timer expired, but that's
> not done here.

Indeed, but I don't think this really matters, at least not for
save/restore. We always clear the ISTATUS bit on restore, and
snapshoting CTL is always a racy process.

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2025-09-30 12:05 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-29 16:04 [PATCH 00/13] KVM: arm64: De-specialise the timer UAPI Marc Zyngier
2025-09-29 16:04 ` [PATCH 01/13] KVM: arm64: Hide CNTHV_*_EL2 from userspace for nVHE guests Marc Zyngier
2025-09-30  0:35   ` Oliver Upton
2025-09-30  7:44     ` Marc Zyngier
2025-09-29 16:04 ` [PATCH 02/13] KVM: arm64: Introduce timer_context_to_vcpu() helper Marc Zyngier
2025-09-29 16:04 ` [PATCH 03/13] KVM: arm64: Replace timer context vcpu pointer with timer_id Marc Zyngier
2025-09-30 10:13   ` Joey Gouly
2025-09-29 16:04 ` [PATCH 04/13] KVM: arm64: Make timer_set_offset() generally accessible Marc Zyngier
2025-09-29 16:04 ` [PATCH 05/13] KVM: arm64: Add timer UAPI workaround to sysreg infrastructure Marc Zyngier
2025-09-30  0:41   ` Oliver Upton
2025-09-30  7:48     ` Marc Zyngier
2025-09-29 16:04 ` [PATCH 06/13] KVM: arm64: Move CNT*_CTL_EL0 userspace accessors to generic infrastructure Marc Zyngier
2025-09-29 16:04 ` [PATCH 07/13] KVM: arm64: Move CNT*_CVAL_EL0 " Marc Zyngier
2025-09-29 16:04 ` [PATCH 08/13] KVM: arm64: Move CNT*CT_EL0 " Marc Zyngier
2025-09-30 10:45   ` Joey Gouly
2025-09-30 12:05     ` Marc Zyngier [this message]
2025-09-30 12:41       ` Joey Gouly
2025-09-29 16:04 ` [PATCH 09/13] KVM: arm64: Fix WFxT handling of nested virt Marc Zyngier
2025-09-29 16:04 ` [PATCH 10/13] KVM: arm64: Kill leftovers of ad-hoc timer userspace access Marc Zyngier
2025-09-29 16:04 ` [PATCH 11/13] KVM: arm64: selftests: Make dependencies on VHE-specific registers explicit Marc Zyngier
2025-09-29 16:04 ` [PATCH 12/13] KVM: arm64: selftests: Add an E2H=0-specific configuration to get_reg_list Marc Zyngier
2025-09-29 16:04 ` [PATCH 13/13] KVM: arm64: selftest: Fix misleading comment about virtual timer encoding Marc Zyngier
2025-10-13 16:55 ` [PATCH 00/13] KVM: arm64: De-specialise the timer UAPI Marc Zyngier

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