From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 635981F1302; Wed, 21 May 2025 11:01:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747825290; cv=none; b=JWJvifIM4sPEw5O2/uIOTi1XNeVvaljrZ4cZLEbNqss4fhrvahpUuLjS7FV6Sx1CUJ87IzR7AT7JsuszgJwML5qP3Rz0VC549Hism9Jzeo38/4f0AXgKroQY7YKspxwP0RpSYpmvcc2QjNM5CCvNBzXSMODt+tu4qcF9Am9Fq9w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747825290; c=relaxed/simple; bh=zaBsSd8mPSFOHTfY9yBi6h2zBc3yt1iHjwy2YomFPvo=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=X4c4Vs8rKy3SsXZT9BMcDABFlcRcnV4iRrCqb2VTaZb/dKLIGZpFGNRVabVgWKytHMZ3GQj1fgtinRg2t93HQXtk1iAzmxKsdULQVXC6+WThyB2QnlZe4T1IJqeS/rJz4pQCoVQAwguMRUv4pTu81vI/HbrEQgOMQMcJxFkrpuk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=f4RBRtAS; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="f4RBRtAS" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C4B5FC4CEEA; Wed, 21 May 2025 11:01:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747825289; bh=zaBsSd8mPSFOHTfY9yBi6h2zBc3yt1iHjwy2YomFPvo=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=f4RBRtASQQgroR+gBiVGxYwzyKX+2Z2a/XJYsfTkAtQHULvNOVEA9DfovmNx95Y2Q vNEuMaMetzT9fP6nhxy3iFh51g7xGiiU6UEnMRyCBIDyM7sAJ5fVSOeGJ9V8vkRZE+ 2kfgkjYP+7BuwQ5tfV7JTRpcF206VmTSw/xBdO2GPiYz3beUNMM1LeMXnpu/P5qwLG 1mQRNzWA1Dvv0jL6fbum1URW9C4hueLcAls2JmmpSq4ihv14RvS+tsW4gpsnuG2+Pi /5J2FVPnM79L7sc/cYIdcD/P91JWRVsqISGIc2DKZkYPe+L2ISU8YgYlRgbYctj5Y4 BrHSMlibZchqg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1uHhCR-00Gu8c-1S; Wed, 21 May 2025 12:01:27 +0100 Date: Wed, 21 May 2025 12:01:26 +0100 Message-ID: <86tt5edy7t.wl-maz@kernel.org> From: Marc Zyngier To: Vincent Donnefort Cc: oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, qperret@google.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kernel-team@android.com Subject: Re: [PATCH v5 10/10] KVM: arm64: np-guest CMOs with PMD_SIZE fixmap In-Reply-To: <20250520085201.3059786-11-vdonnefort@google.com> References: <20250520085201.3059786-1-vdonnefort@google.com> <20250520085201.3059786-11-vdonnefort@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: vdonnefort@google.com, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, qperret@google.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 20 May 2025 09:52:01 +0100, Vincent Donnefort wrote: > > With the introduction of stage-2 huge mappings in the pKVM hypervisor, > guest pages CMO is needed for PMD_SIZE size. Fixmap only supports > PAGE_SIZE and iterating over the huge-page is time consuming (mostly due > to TLBI on hyp_fixmap_unmap) which is a problem for EL2 latency. > > Introduce a shared PMD_SIZE fixmap (hyp_fixblock_map/hyp_fixblock_unmap) > to improve guest page CMOs when stage-2 huge mappings are installed. > > On a Pixel6, the iterative solution resulted in a latency of ~700us, > while the PMD_SIZE fixmap reduces it to ~100us. > > Because of the horrendous private range allocation that would be > necessary, this is disabled for 64KiB pages systems. > > Suggested-by: Quentin Perret > Signed-off-by: Vincent Donnefort > Signed-off-by: Quentin Perret > > diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h > index 1b43bcd2a679..2888b5d03757 100644 > --- a/arch/arm64/include/asm/kvm_pgtable.h > +++ b/arch/arm64/include/asm/kvm_pgtable.h > @@ -59,6 +59,11 @@ typedef u64 kvm_pte_t; > > #define KVM_PHYS_INVALID (-1ULL) > > +#define KVM_PTE_TYPE BIT(1) > +#define KVM_PTE_TYPE_BLOCK 0 > +#define KVM_PTE_TYPE_PAGE 1 > +#define KVM_PTE_TYPE_TABLE 1 > + > #define KVM_PTE_LEAF_ATTR_LO GENMASK(11, 2) > > #define KVM_PTE_LEAF_ATTR_LO_S1_ATTRIDX GENMASK(4, 2) > diff --git a/arch/arm64/kvm/hyp/include/nvhe/mm.h b/arch/arm64/kvm/hyp/include/nvhe/mm.h > index 230e4f2527de..6e83ce35c2f2 100644 > --- a/arch/arm64/kvm/hyp/include/nvhe/mm.h > +++ b/arch/arm64/kvm/hyp/include/nvhe/mm.h > @@ -13,9 +13,11 @@ > extern struct kvm_pgtable pkvm_pgtable; > extern hyp_spinlock_t pkvm_pgd_lock; > > -int hyp_create_pcpu_fixmap(void); > +int hyp_create_fixmap(void); > void *hyp_fixmap_map(phys_addr_t phys); > void hyp_fixmap_unmap(void); > +void *hyp_fixblock_map(phys_addr_t phys, size_t *size); > +void hyp_fixblock_unmap(void); > > int hyp_create_idmap(u32 hyp_va_bits); > int hyp_map_vectors(void); > diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c b/arch/arm64/kvm/hyp/nvhe/mem_protect.c > index 1490820b9ebe..962948534179 100644 > --- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c > +++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c > @@ -216,34 +216,42 @@ static void guest_s2_put_page(void *addr) > hyp_put_page(¤t_vm->pool, addr); > } > > -static void clean_dcache_guest_page(void *va, size_t size) > +static void __apply_guest_page(void *va, size_t size, > + void (*func)(void *addr, size_t size)) > { > size += va - PTR_ALIGN_DOWN(va, PAGE_SIZE); > va = PTR_ALIGN_DOWN(va, PAGE_SIZE); > size = PAGE_ALIGN(size); > > while (size) { > - __clean_dcache_guest_page(hyp_fixmap_map(__hyp_pa(va)), > - PAGE_SIZE); > - hyp_fixmap_unmap(); > - va += PAGE_SIZE; > - size -= PAGE_SIZE; > + size_t map_size = PAGE_SIZE; > + void *map; > + > + if (size >= PMD_SIZE) > + map = hyp_fixblock_map(__hyp_pa(va), &map_size); You seem to consider that if size if PMD_SIZE (or more), then va must be PMD aligned. I don't think this is correct. Such an iterator should start by doing PAGE_SIZEd operations until va is PMD-aligned. Only at this point can it perform PMD_SIZEd operations, until the remaining size is less than PMD_SIZE. And at that point, it's PAGE_SIZE all over again until the end. Does that make sense to you? M. -- Without deviation from the norm, progress is not possible.